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參數資料

Rev 0.6 / Oct. 2004

HY27SS(08/16)121M Series

HY27US(08/16)121M Series

512Mbit (64Mx8bit / 32Mx16bit) NAND Flash

Data Output

Data Output bus operations are used to read: the data in the memory array, the Status Register, the Electronic Signa-

ture and the Serial Number. Data is output when Chip Enable is Low, Write Enable is High, Address Latch Enable is

Low, and Command Latch Enable is Low. The data is output sequentially using the Read Enable signal.

See Figure 24 and Table 15 for details of the timings requirements.

Write Protect

Write Protect bus operations are used to protect the memory against program or erase operations. When the Write

Protect signal is Low the device will not accept program or erase operations and so the contents of the memory array

cannot be altered. The Write Protect signal is not latched by Write Enable to ensure protection even during power-up.

Standby

When Chip Enable is High the memory enters Standby mode, the device is deselected, outputs are disabled and power

consumption is reduced.

相關代理商/技術參數	參數描述
HY27UA081G1M	制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Memory
HY27UA161G1M	制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Memory
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