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參數資料
型號: HY27SSxxx
廠商: Hynix Semiconductor Inc.
英文描述: 512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
中文描述: 512兆(64Mx8bit / 32Mx16bit)NAND閃存
文件頁數: 28/43頁
文件大小: 729K
代理商: HY27SSXXX
Rev 0.6 / Oct. 2004
28
HY27SS(08/16)121M Series
HY27US(08/16)121M Series
512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
Table 14: AC Characteristics for Command, Address, Data Input (3.3V and 1.8V Device)
Note: 1. If t
ELWL
is less than 10ns, t
WLWH
must be minimum 35ns, otherwise, t
WLWH
may be minimum 25ns.
Symbol
Alt.
Symbol
Parameter
3.3V
Device
1.8V
Device
Unit
t
ALLWL
t
ALS
Address Latch Low to Write Enable Low
ALE Setup time
Min
0
ns
t
ALHWL
Address Latch Hith to Write Enable Low
t
CLHWL
t
CLS
Command Latch High to Write Enable Low
CL Setup time
Min
0
ns
t
CLLWL
Command Latch Low to Write Enable Low
t
DVWH
t
DS
Data Valid to Write Enable High
Data Setup time
Min
20
ns
t
ELWL
t
CS
Chip Enable Low to Write Enable Low
CE Setup time
Min
0
ns
t
WHALH
t
ALH
Write Enable High to Address Latch High
ALE Hold time
Min
10
ns
t
WHALL
Write Enable High to Address Latch Low
t
WHCLH
t
CLH
Write Enable High to Command Latch High
CLE hold time
Min
10
ns
t
WHCLL
Write Enable High to Command Latch Low
t
WHDX
t
DH
Write Enable High to Data Transition
Data Hold time
Min
10
ns
t
WHEH
t
CH
Write Enable High to Chip Enable High
CE Hold time
Min
10
ns
t
WHWH
t
WH
Write Enable High to Write Enable Low
WE High Hold time
Min
15
20
ns
t
WLWH
t
WP
Write Enable Low to Write Enable High
WE Pulse Width
Min
25
(1)
60
ns
t
WLWL
t
WC
Write Enable Low to Write Enable Low
Write Cycle time
Min
50
80
ns
相關PDF資料
PDF描述
HY27SS08121M 512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
HY27SS16121M 512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
HY27US08121M 512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
HY27USxxx 512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
HY27US16121M 512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
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