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參數資料
| 型號： | HY29LV800T-90I |
| 廠商： | Hynix Semiconductor Inc. |
| 英文描述： | 8 Mbit (1M x 8/512K x 16) Low Voltage Flash Memory |
| 中文描述： | 8兆位（100萬x 8/512K × 16）低壓快閃記憶體 |
| 文件頁數： | 1/40頁 |
| 文件大小： | 556K |
| 代理商： | HY29LV800T-90I |
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Preliminary
Revision 1.0, November 2001
KEY FEATURES
Single Power Supply Operation
– Read, program and erase operations from
2.7 to 3.6 volts
– Ideal for battery-powered applications
High Performance
– 70 and 90 ns access time versions for full
voltage range operation
– 55 ns access time version for operation
from 3.0 to 3.6 volts
Ultra-low Power Consumption (Typical
Values)
– Automatic sleep mode current: 0.2 μA
– Standby mode current: 0.2 μA
– Read current: 7 mA (at 5 Mhz)
– Program/erase current: 15 mA
Flexible Sector Architecture:
– One 16 KB, two 8 KB, one 32 KB and
fifteen 64 KB sectors in byte mode
– One 8 KW, two 4 KW, one 16 KW and
fifteen 32 KW sectors in word mode
– Top or bottom boot block configurations
available
Sector Protection
– Allows locking of a sector or sectors to
prevent program or erase operations
within that sector
– Sectors lockable in-system or via
programming equipment
– Temporary Sector Unprotect allows
changes in locked sectors (requires high
voltage on RESET# pin)
Fast Program and Erase Times
– Sector erase time: 0.5 sec typical for each
sector
– Chip erase time: 10 sec typical
– Byte program time: 9
μ
s typical
– Word program time: 11
μ
s typical
Unlock Bypass Program Command
– Reduces programming time when issuing
multiple program command sequences
Automatic Erase Algorithm Preprograms
and Erases Any Combination of Sectors
or the Entire Chip
Automatic Program Algorithm Writes and
Verifies Data at Specified Addresses
A[18:0]
19
CE#
OE#
RESET#
BYTE#
WE#
8
7
DQ[7:0]
DQ[14:8]
DQ[15]/A[-1]
RY/BY#
LOGIC DIAGRAM
Minimum 100,000 Write Cycles per Sector
Compatible With JEDEC standards
–
Pinout and software compatible with
single-power supply Flash devices
–
Superior inadvertent write protection
Data# Polling and Toggle Bits
–
Provide software confirmation of
completion of program and erase
operations
Ready/Busy# Pin
–
Provides hardware confirmation of
completion of program and erase
operations
Erase Suspend/Erase Resume
–
Suspends an erase operation to allow
reading data from, or programming data
to, a sector that is not being erased
–
Erase Resume can then be invoked to
complete suspended erasure
Hardware Reset Pin (RESET#) Resets the
Device to Reading Array Data
Space Efficient Packaging
–
44-pin PSOP, 48-pin TSOP and 48-ball
FBGA packages
HY29LV800
8 Mbit (1M x 8/512K x 16) Low Voltage Flash Memory
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