欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數(shù)資料
型號(hào): ICS90C64A-907N
英文描述: Video/Graphics Clock Generator
中文描述: 視頻/圖形時(shí)鐘發(fā)生器
文件頁數(shù): 1/10頁
文件大小: 360K
代理商: ICS90C64A-907N
90C65ARevA111095
Dual Voltage Video/Memory Clock Generator
Introduction
The Integrated Circuit Systems
ICS90C65
is a dual clock
generator for VGA applications. It simultaneously generates
two clocks. One clock is for the video memory, and the other
is the video dot clock.
The
ICS90C65
has been specifically designed to serve the
portable PC market with operation at either 3.3V or 5V with a
comprehensive power-saving shut-down mode.
This data sheet supplies sales order information, a functional
overview, signal pin details, a block diagram, AC/DC charac-
teristics, timing diagrams, and package mechanical information.
Description
The Integrated Circuit Systems Video Graphics Array Clock
Generator (
ICS90C65)
is capable of producing different out-
put frequencies under firmware control. The video output
frequency is derived from a 14.318 MHz system clock avail-
able in IBM PC/XT/AT and Personal System/2 computers. It
is designed to work with Western Digital
Imaging
Video
Graphics Array and 8514/A devices to optimize video subsys-
tem performance.
The video dot clock output may be one of 15 internally-
generated frequencies or one external input. The selection of
the video dot clock frequency is done through four inputs.
Features
Specified for dual voltage operation (V
DD
=3.3V or 5V),
but operates continuously from 3.0V to 5.25V
Designed to be powered-down for extended battery life
Backward compatibility to the ICS90C64 and ICS90C63
Dual Clock generator for the IBM-compatible Western
Digital Imaging Video Graphics Array (VGA) LSI
devices, and 8514/A chip sets
Integral loop filter components, reduce cost and phase
jitter
Generates fifteen video clock frequencies (including
25.175 and 28.322 MHz) derived from a 14.318 MHz
system clock reference frequency
On-chip generation of eight memory clock frequencies
Video clock is selectable among the 15 internally gener-
ated clocks and one external clock
CMOS technology
Available in 20-pin PLCC, SOIC and DIP packages
Integrated
Circuit
Systems, Inc.
Note:ICS90C65N (DIP) pin-out is identical to ICS90C65M (SOIC) pin-out.
ICS90C65
VSEL0
VSEL1
VSEL2
VSEL3
VSEL0 and VSEL1 are latched by the SELEN signal. VSEL2
and VSEL3 are used as direct inputs to the VCLK selection.
Table 1-1 is the truth table for VCLK selection.
The input and truth table have been designed to allow a direct
connection to one of the many Western Digital Imaging VGA
controllers or 8514/A chip sets.
The MCLK output is one of eight internally-generated frequen-
cies as shown in Table 1-2. The various VCLK and MCLK
frequencies are derived from the 14.318 MHz input frequency.
The VCLKE and MCLKE input can tristate the VCLK and
MCLK outputs to facilitate board level testing.
相關(guān)PDF資料
PDF描述
ICS90C64A-907V Video/Graphics Clock Generator
ICS90C64A-909M Video/Graphics Clock Generator
ICS90C64A-909N Video/Graphics Clock Generator
ICS90C64A-909V Video/Graphics Clock Generator
ICS90C64A-XXXM Peripheral IC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ICS90C64A-907V 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video/Graphics Clock Generator
ICS90C64A-909M 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video/Graphics Clock Generator
ICS90C64A-909N 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video/Graphics Clock Generator
ICS90C64A-909V 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video/Graphics Clock Generator
ICS90C64A-XXXM 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Peripheral IC
主站蜘蛛池模板: 砚山县| 海丰县| 丹东市| 二连浩特市| 股票| 乐安县| 清水河县| 东台市| 鄯善县| 乐业县| 石楼县| 称多县| 淅川县| 东乡族自治县| 益阳市| 尚义县| 平和县| 石阡县| 屏东市| 葫芦岛市| 遂溪县| 师宗县| 麻栗坡县| 肇东市| 长春市| 大同县| 义乌市| 扎鲁特旗| 樟树市| 宁海县| 玉树县| 镇远县| 湘潭县| 漳浦县| 秦安县| 富源县| 河曲县| 奇台县| 调兵山市| 犍为县| 龙游县|