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參數(shù)資料
型號(hào): IDT74LVCR162245APVG8
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 1/6頁(yè)
文件大?。?/td> 0K
描述: IC BUS TRSCVR 3-ST 16BIT 48SSOP
標(biāo)準(zhǔn)包裝: 1,000
系列: 74LVCR
邏輯類型: 收發(fā)器,非反相
元件數(shù): 2
每個(gè)元件的位元數(shù): 8
輸出電流高,低: 12mA,12mA
電源電壓: 2.7 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-BSSOP(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 48-SSOP
包裝: 帶卷 (TR)
其它名稱: 74LVCR162245APVG8
INDUSTRIALTEMPERATURERANGE
IDT74LVCR162245A
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
1
OCTOBER
2008
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2006 Integrated Device Technology, Inc.
DSC-4691/4
FEATURES:
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
CMOS power levels (0.4
μμμμμ W typ. static)
All inputs, outputs, and I/O are 5V tolerant
Supports hot insertion
Available in SSOP and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
APPLICATIONS:
5V and 3.3V mixed voltage systems
Data communication and telecommunication systems
DRIVE FEATURES:
Balanced Output Drivers: ±12mA
Low switching noise
IDT74LVCR162245A
DESCRIPTION:
This 16-bit bus transceiver is built using advanced dual metal CMOS
technology. This high-speed, low power transceiver is ideal for asynchro-
nous communication between two busses (A and B). The Direction and
Output Enable controls are designed to operate this device as either two
independent 8-bit transceivers or one 16-bit transceiver. The direction
control pin (DIR) controls the direction of data flow. The output enable pin
(
OE) overrides the direction control and disables both ports. All inputs are
designed with hysteresis for improved noise margin.
All pins can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V supply system.
The LVCR162245A has series resistors in the device output structure
which will significantly reduce line noise when used with light loads. The
driver has been designed to drive ±12mA at the designated threshold
levels.
3.3V CMOS 16-BIT
BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
AND 5 VOLT TOLERANT I/O
1
DIR
1
A1
1
A2
1
A3
1
A4
1
A5
1
A6
1
A7
1
A8
1
B8
1
B7
1
B6
1
B5
1
B4
1
B3
1
B2
1
B1
1
OE
2
DIR
2
A1
2
A2
2
A3
2
A4
2
A5
2
A6
2
A7
2
A8
2
B8
2
B7
2
B6
2
B5
2
B4
2
B3
2
B2
2
B1
2
OE
1
47
46
44
43
41
40
38
37
48
2
3
5
6
8
9
11
12
24
36
35
33
32
30
29
27
26
25
13
14
16
17
19
20
22
23
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