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參數資料
型號: IS41C44002AS(L)
英文描述: 4M x 4 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
中文描述: 4米× 4(16兆)動態與江戶頁面模式內存
文件頁數: 8/20頁
文件大小: 297K
代理商: IS41C44002AS(L)
8
Integrated Circuit Solution Inc.
DR026-0A 09/04/2001
IC41C44002A/IC41C44002AS(L)
IC41LV44002A/IC41LV44002AS(L)
AC CHARACTERISTICS
(Continued)
(1,2,3,4,5,6)
(Recommended Operating Conditions unless otherwise noted.)
-
50
-
60
Symbol
Parameter
Min.
Max.
Min.
Max.
Units
t
OEH
OE
Hold Time from
WE
during
READ-MODIFY-WRITE cycle
(18)
Data-In Setup Time
(15, 22)
Data-In Hold Time
(15, 22)
READ-MODIFY-WRITE Cycle Time
RAS
to
WE
Delay Time during
READ-MODIFY-WRITE Cycle
(14)
CAS
to
WE
Delay Time
(14, 20)
Column-Address to
WE
Delay Time
(14)
EDO Page Mode READ or WRITE
Cycle Time
RAS
Pulse Width in EDO Page Mode
Access Time from
CAS
Precharge
(15)
EDO Page Mode READ-WRITE
Cycle Time
Data Output Hold after
CAS
LOW
Output Buffer Turn-Off Delay from
CAS
or
RAS
(13,15,19, 24)
Output Disable Delay from
WE
CAS
Setup Time (CBR REFRESH)
(20, 25)
CAS
Hold Time (CBR REFRESH)
( 21, 25)
RAS
to
CAS
Precharge Time
OE
Setup Time prior to
RAS
during
HIDDEN REFRESH Cycle
Auto Refresh Period
Transition Time (Rise or Fall)
(2, 3)
8
10
ns
t
DS
t
DH
t
RWC
t
RWD
0
8
0
10
133
77
ns
ns
ns
ns
108
64
t
CWD
t
AWD
t
PC
26
39
20
32
47
25
ns
ns
ns
t
RASP
t
CPA
t
PRWC
50
56
100K
30
60
68
100K
35
ns
ns
ns
t
COH
t
OFF
5
0
12
5
0
15
ns
ns
t
WHZ
t
CSR
t
CHR
t
RPC
t
ORD
3
5
8
5
0
10
3
5
10
5
0
10
ns
ns
ns
ns
ns
t
REF
t
T
2,048 Cycles
1
50
32
1
50
32
ns
ms
AC TEST CONDITIONS
Output load:
Two TTL Loads and 100 pF (Vcc=5.0V
±
10%)
One TTL Loads and 100 pF (Vcc=3.3V
±
10%)
Input timing reference levels: V
IH
= 2.4V, V
IL
= 0.8V
Output timing reference levels: V
OH
= 2.0V, V
OL
= 0.8V
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IS41LV44002A 4M x 4 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
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