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參數資料
| 型號： | IS41LV1665-40K |
| 英文描述： | 64K x16 bit Dynamic RAM with Fast Page Mode |
| 中文描述： | 64K的x16位動態隨機存儲器和快速頁面模式 |
| 文件頁數： | 4/19頁 |
| 文件大小： | 388K |
| 代理商： | IS41LV1665-40K |
IC41C1665
IC41LV1665
4
Integrated Circuit Solution Inc.
DR031-0A 10/17/2001
TRUTH TABLE
Function
Standby
Read: Word
Read: Lower Byte
RAS
H
L
L
LCAS UCAS
H
L
L
H
L
H
W E
X
H
H
O E
X
L
L
Address t
R
/t
C
X
ROW/COL
ROW/COL
I/O
High-Z
D
OUT
Lower Byte, D
OUT
Upper Byte, High-Z
Lower Byte, High-Z
Upper Byte, D
OUT
D
IN
Lower Byte, D
IN
Upper Byte, High-Z
Lower Byte, High-Z
Upper Byte, D
IN
D
OUT
, D
IN
D
OUT
D
IN
High-Z
High-Z
Read: Upper Byte
L
H
L
H
L
ROW/COL
Write: Word (Early Write)
Write: Lower Byte (Early Write)
L
L
L
L
L
H
L
L
X
X
ROW/COL
ROW/COL
Write: Upper Byte (Early Write)
L
H
L
L
X
ROW/COL
Read-Write
(1,2)
Hidden Refresh
2)
L
L
L
L
H
L
L
L
L
H
L
H
→
L
H
L
X
X
L
→
H
L
X
X
X
ROW/COL
ROW/COL
ROW/COL
ROW/NA
X
Read L
→
H
→
L
Write L
→
H
→
L
RAS
-Only Refresh
CBR Refresh
(3)
L
H
→
L
Notes:
1. These WRITE cycles may also be BYTE WRITE cycles (either
LCAS
or
UCAS
active).
2. These READ cycles may also be BYTE READ cycles (either
LCAS
or
UCAS
active).
3. At least one of the two CAS signals must be active (
LCAS
or
UCAS
).
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| IS41LV44002-50JI | x4 EDO Page Mode DRAM |
| IS41LV44002-50T | x4 EDO Page Mode DRAM |
| IS41LV44002-50TI | x4 EDO Page Mode DRAM |
| IS41LV44002-60J | x4 EDO Page Mode DRAM |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| IS41LV32256 | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:256K x 32 (8-Mbit) EDO DYNAMIC RAM 3.3V, 100/83/66 MHz |
| IS41LV32256-28PQ | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:256K x 32 (8-Mbit) EDO DYNAMIC RAM 3.3V, 100/83/66 MHz |
| IS41LV32256-28TQ | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:256K x 32 (8-Mbit) EDO DYNAMIC RAM 3.3V, 100/83/66 MHz |
| IS41LV32256-30PQ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x32 EDO Page Mode DRAM |
| IS41LV32256-30TQ | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:256K x 32 (8-Mbit) EDO DYNAMIC RAM 3.3V, 100/83/66 MHz |
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