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參數資料
| 型號： | IS42S32400A-7B |
| 英文描述： | 16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
| 中文描述： | 16Meg × 8，8Meg x16 |
| 文件頁數： | 34/66頁 |
| 文件大小： | 556K |
| 代理商： | IS42S32400A-7B |
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ISSI
34
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
ADVANCED INFORMATION
Rev. 00A
06/01/02
IS42S81600A, IS42S16800A, IS42S32400A
IS42LS81600A, IS42LS16800A, IS42LS32400A
same bank. The PRECHARGE command should be issued
x
cycles before the clock edge at which the last desired data
element is valid, where
x
equals the CAS latency minus one.
This s shown n the READ to PRECHARGE diagram for each
possible CAS latency; data element
n
+ 3 is either the last of
a burst of four or the last desired of a longer burst. Following
the PRECHARGE command, a subsequent command to the
same bank cannot be issued until t
RP
is met. Note that part
of the row precharge time is hidden during the access of the
last data element(s).
In the case of a fixed-length burst being executed to
completion, a PRECHARGE command issued at the opti-
mum time (as described above) provides the same opera-
tion that would result from the same fixed-length burst with
auto precharge. The disadvantage of the PRECHARGE
command is that it requires that the command and address
buses be available at the appropriate time to issue the
command; the advantage of the PRECHARGE command is
that it can be used to truncate fixed-length or full-page
bursts.
Full-page READ bursts can be truncated with the BURST
TERMINATE command, and fixed-length READ bursts
may be truncated with a BURST TERMINATE command,
provided that auto precharge was not activated. The BURST
TERMINATE command should be issued
x
cycles before
the clock edge at which the last desired data element is
valid, where
x
equals the CAS latency minus one. This is
shown in the READ Burst Termination diagram for each
possible CAS latency; data element
n
+ 3 is the last desired
data element of a longer burst.
相關PDF資料 |
PDF描述 |
|---|---|
| IS42S32400A-7BI | 16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
| IS42S32400A-7T | 16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
| IS42S32400A-7TI | 16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
| IS42LS32400A-10B | 16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
| IS42LS32400A | 16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
相關代理商/技術參數 |
參數描述 |
|---|---|
| IS42S32400A-7BI | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
| IS42S32400A-7BL | 制造商:Integrated Silicon Solution Inc 功能描述: |
| IS42S32400A-7T | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
| IS42S32400A-7TI | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
| IS42S32400A-7TL | 制造商:Integrated Silicon Solution Inc 功能描述: |
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