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參數資料
型號: ISP1161A1BD
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Universal Serial Bus single-chip host and device controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
文件頁數: 89/127頁
文件大小: 2762K
代理商: ISP1161A1BD
Philips Semiconductors
ISP1161
Full-speed USB single-chip host and device controller
Product data
Rev. 01 — 3 July 2001
89 of 130
9397 750 08313
Philips Electronics N.V. 2001. All rights reserved.
[1]
[2]
[3]
[4]
[5]
[6]
With N representing the number of bytes, the number of words for 16-bit bus width is: (N + 1) DIV 2.
Validating an OUT endpoint buffer causes unpredictable behavior of ISP1161’s DC.
Clearing an IN endpoint buffer causes unpredictable behavior of ISP1161’s DC.
Reads a copy of the Status Register: executing this command does not clear any status bits or interrupt bits.
When accessing an 8-bit register in 16-bit mode, the upper byte is invalid.
During isochronous transfer in 16-bit mode, because N
1023, the firmware must take care of the upper byte.
14.1 Initialization commands
Initialization commands are used during the enumeration process of the USB
network. These commands are used to configure and enable the embedded
endpoints. They also serve to set the USB assigned address of ISP1161’s DC and to
perform a device reset.
14.1.1
Write/Read Endpoint Configuration
This command is used to access the Endpoint Configuration Register (ECR) of the
target endpoint. It defines the endpoint type (isochronous or bulk/interrupt), direction
(OUT/IN), FIFO size and buffering scheme. It also enables the endpoint FIFO. The
register bit allocation is shown in
Table 75
. A bus reset will disable all endpoints.
The allocation of FIFO memory only takes place after
all
16 endpoints have been
configured in sequence (from endpoint 0 OUT to endpoint 14). Although the control
endpoints have fixed configurations, they must be included in the initialization
sequence and be configured with their default values (see
Table 7
). Automatic FIFO
allocation starts when endpoint 14 has been configured.
Remark:
If any change is made to an endpoint configuration which affects the
allocated memory (size, enable/disable), the FIFO memory contents of
all
endpoints
becomes invalid. Therefore, all valid data must be removed from enabled endpoints
before changing the configuration.
Code (Hex): 20 to 2F —
write (control OUT, control IN, endpoint 1 to 14)
Code (Hex): 30 to 3F —
read (control OUT, control IN, endpoint 1 to 14)
Transaction —
write/read 1 word
Read Chip ID
Read Interrupt Register
Chip ID Register
Interrupt Register
B5
C0
read 1 word
read 2 words
Table 74: Command and register summary
…continued
Name
Destination
Code (Hex)
Transaction
[1]
Table 75: Endpoint Configuration Register: bit allocation
Bit
7
Symbol
FIFOEN
Reset
0
Access
R/W
6
5
4
3
2
1
0
EPDIR
0
R/W
DBLBUF
0
R/W
FFOISO
0
R/W
FFOSZ[3:0]
0
0
0
0
R/W
R/W
R/W
R/W
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相關代理商/技術參數
參數描述
ISP1161A1BD,118 功能描述:USB 接口集成電路 USB1.1 HOST &DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161A1BD,151 功能描述:USB 接口集成電路 USB1.1 HOST &DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161A1BD,157 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161A1BDFA 功能描述:IC USB HOST CONTROLLER 64LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應商設備封裝:36-QFN(6x6) 包裝:* 其它名稱:Q6396337A
ISP1161A1BD-S 功能描述:USB 接口集成電路 USB1.1 HOST &DEVICE CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
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