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| 型號(hào)： | ISP1161A |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Full-speed Universal Serial Bus single-chip host and device controller |
| 中文描述： | 全速通用串行總線的單芯片主機(jī)和設(shè)備控制器 |
| 文件頁(yè)數(shù)： | 90/134頁(yè) |
| 文件大?。?/td> | 587K |
| 代理商： | ISP1161A |
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Philips Semiconductors
ISP1161A
Full-speed USB single-chip host and device controller
Product data
Rev. 03 — 23 December 2004
90 of 134
9397 750 13962
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
13. DC commands and registers
The functions and registers of ISP1161A’s DC are accessed via commands, which
consist of a command code followed by optional data bytes (read or write action). An
overview of the available commands and registers is given in
Table 75
.
A complete access consists of two phases:
1.
Command phase
: when address bit A0 = 1, the DC interprets the data on the
lower byte of the bus (bits D7 to D0) as a command code. Commands without a
data phase are executed immediately.
2.
Data phase (optional)
: when address bit A0 = 0, the DC transfers the data on
the bus to or from a register or endpoint FIFO. Multi-byte registers are accessed
least significant byte/word first.
As the ISP1161A DC’s data bus is 16 bits wide:
The upper byte (bits D15 to D8) in command phase, or the undefined byte in data
phase and is ignored.
The access of registers is word-aligned: byte access is not allowed.
If the packet length is odd, the upper byte of the last word in an IN endpoint buffer
is
not
transmitted to the host. When reading from an OUT endpoint buffer, the
upper byte of the last word must be ignored by the firmware. The packet length is
stored in the first 2 bytes of the endpoint buffer.
Table 75:
Name
Initialization commands
Write Control OUT Configuration
DC command and register summary
Destination
Code (Hex)
Transaction
[1]
DcEndpointConfiguration register
endpoint 0 OUT
DcEndpointConfiguration register
endpoint 0 IN
DcEndpointConfiguration register
endpoint 1 to 14
DcEndpointConfiguration register
endpoint 0 OUT
DcEndpointConfiguration register
endpoint 0 IN
DcEndpointConfiguration register
endpoint 1 to 14
DcAddress register
DcMode register
20
write 1 word
Write Control IN Configuration
21
write 1 word
Write Endpoint n Configuration
(n = 1 to 14)
Read Control OUT Configuration
22 to 2F
write 1 word
30
read 1 word
Read Control IN Configuration
31
read 1 word
Read Endpoint n Configuration
(n = 1 to 14)
Write/Read Device Address
Write/Read DcMode register
Write/Read Hardware Configuration DcHardwareConfiguration register
Write/Read DcInterruptEnable
register
Write/Read DMA Configuration
Write/Read DMA Counter
Reset Device
32 to 3F
read 1 word
B6/B7
B8/B9
BA/BB
C2/C3
write/read 1 word
write/read 1 word
write/read 1 word
write/read 2 words
DcInterruptEnable register
DcDMAConfiguration register
DcDMACounter register
resets all registers
F0/F1
F2/F3
F6
write/read 1 word
write/read 1 word
-
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| ISP1161A1 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Universal Serial Bus single-chip host and device controller |
| ISP1161A1BD | 功能描述:IC USB HOST/DEVICE CTRLR 64-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| ISP1161A1BD,118 | 功能描述:USB 接口集成電路 USB1.1 HOST &DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1161A1BD,151 | 功能描述:USB 接口集成電路 USB1.1 HOST &DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1161A1BD,157 | 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
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