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參數(shù)資料
| 型號： | ISP1562BE |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | Hi-Speed Universal Serial Bus PCI Host Controller |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-407-1, LQFP-100 |
| 文件頁數(shù)： | 30/98頁 |
| 文件大小： | 442K |
| 代理商： | ISP1562BE |
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9397 750 14223
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 14 July 2005
30 of 98
Philips Semiconductors
ISP1562
USB PCI Host Controller
8.2.3.6
Data register
The Data register is an optional, 1 B register that provides a mechanism for the function to
report state dependent operating data, such as power consumed or heat dissipated.
Table 40
shows the bit description of the register.
Table 38:
PMCSR_BSE - PMCSR PCI-to-PCI Bridge Support Extensions register bit
description
Address: Value read from address 34h + 6h
Bit
Symbol
Description
7
BPCC_EN
Bus Power/Clock Control Enable
:
1 —
Indicates that the bus power or clock control mechanism as defined in
Table 39
is enabled
0 —
Indicates that the bus or power control policies as defined in
Table 39
are disabled.
When the Bus Power or Clock Control mechanism is disabled, the bridge’s
PMCSR Power State (PS) field cannot be used by the system software to
control the power or clock of the bridge’s secondary bus.
6
B2_B3#
B2/B3 support for D3
hot
: The state of this bit determines the action that is
to occur as a direct result of programming the function to D3
hot
.
1 —
Indicates that when the bridge function is programmed to D3
hot
, its
secondary bus’s PCI clock will be stopped (B2).
0 —
Indicates that when the bridge function is programmed to D3
hot
, its
secondary bus will have its power removed (B3).
This bit is only meaningful if bit 7 (BPCC_EN) is logic 1.
5 to 0
reserved
-
Table 39:
Originatingdevice’s
bridge PM state
D0
D1
D2
D3
hot
PCI bus power and clock control
Secondary bus
PM state
B0
B1
B2
B2, B3
Resultant actions by bridge
(either direct or indirect)
none
none
clock stopped on secondary bus
clock stopped and PCI V
CC
removed from secondary
bus (B3 only); for definition of B2_B3#, see
Table 38
.
none
D3
cold
B3
Table 40:
Address: Value read from address 34h + 7h
Legend: * reset value
Bit
Symbol
Access
7 to 0
DATA[7:0]
R
Data register bit description
Value
00h*
Description
DATA
: This register is used to report the state dependent
data requested by the D_S field of the PMCSR register.
The value of this register is scaled by the value reported by
the DS field of the PMCSR register.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| ISP1562BE,518 | 功能描述:USB 接口集成電路 USB 2.0 PCI HOST RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1562BE,551 | 功能描述:USB 接口集成電路 USB 2.0 PCI HOST RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1562BE,557 | 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1562BEGA | 功能描述:IC USB HOST CTRL HI-SPD 100LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| ISP1562BEGE | 功能描述:IC USB PCI HOST CTRLR 100-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
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