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參數(shù)資料
| 型號(hào)： | ISPPAC30-01S |
| 廠商： | Lattice Semiconductor Corporation |
| 英文描述： | In-System Programmable Analog Circuit |
| 中文描述： | 在系統(tǒng)可編程模擬電路 |
| 文件頁(yè)數(shù)： | 1/30頁(yè) |
| 文件大小： | 379K |
| 代理商： | ISPPAC30-01S |
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1
pac30_01
ispPAC30
In-System Programmable Analog Circuit
October 2001
Preliminary Data Sheet
Features
■
Flexible Interface and Programming Control
Full con
fi
guration capability, SPI or JTAG modes
Unlimited device updates using SRAM register
E
2
CMOS
for non-volatile con
fi
guration storage
Real-time microcontroller con
fi
guration/control
■
Four Input Instrumentation Ampli
fi
ers (IA’s)
High impedance: differential or single-ended
0V to 2.8V with programmable gains (±1 to ±10)
Dual multiplexers (pin or serial port controlled)
Connects easily to existing system circuits
■
Two Con
fi
gurable Rail-to-Rail Output Amps
Single-ended, 0V to 5V output swing
Gain bandwidth product >15MHz
Ampli
fi
er,
fi
lter, integrator or comparator modes
7
fi
lter frequencies (50kHz to 600kHz)
■
Two, 4-Quadrant 8-Bit Multiplying DAC’s
Full bandwidth when used as a multiplier
Precision gain (<0.01 steps) with signal as input
Precision offset (in 7 ranges) using internal Vref
■
Analog Input/Summation Routing Pools
Routing of all I/O to any IA or MDAC
Any IA/MDAC summed to either output ampli
fi
er
Circuits with and without feedback possible
Routable to maintain pin location relationships
■
Other Product Features
Single supply (+5V) operation
Precision voltage reference output (2.5V)
Power-down for
μ
Watt power consumption
Auto-calibration of internal offsets
Available in 28-pin PDIP or 24-pin SOIC
Applications
Recon
fi
gurable or adaptive signal conditioning
Analog front end for most A/D converters
Programmable analog signal control loops
Precision programmable gain ampli
fi
ers
■
Functional Block Diagram
Description
The ispPAC
System Programmable (ISP) analog integrated cir-
cuits. It is digitally con
fi
gured via SRAM and utilizes
E
CMOS memory for non-volatile storage of its con
fi
gu-
ration. The
fl
exibility of ISP enables programming, veri
fi
-
cation and unlimited recon
fi
guration, directly on the
printed circuit board.
30 is a member of the Lattice family of In-
2
The ispPAC30 is a complete front end solution for data
acquisition applications using 10 to 12-bit ADC's. It pro-
vides multiple single-ended or differential signal inputs,
multiplexing, precision gain, offset adjustment,
fi
ltering,
and comparison functionality. It also has complete
routability of inputs or outputs to any input cell and then
from any input cell to either summing node of the two
output ampli
fi
ers. Designers con
fi
gure the ispPAC30
and verify its performance using PAC-Designer
easy to use, Microsoft Windows
ment tool. Device programming is supported using PC
parallel port I/O operations.
, an
compatible develop-
Dual
12-Bit
ADC
μ
Controller
ispPAC30
Vin2
Vin1
Vin3
GND
12
11
10
9
8
7
6
5
4
3
2
1
13
14
15
16
17
18
19
20
21
22
23
24
CAL
MSEL2
MSEL1
TCK
TDI
TDO
TMS
ENSPI
VS
IN4-
IN4+
IN3-
IN3+
SCOM
OUT2
OUT1
IN2-
IN2+
IN1-
IN1+
PD
CS
ispPAC30 24-Pin SOIC
Vref1
IA
MDAC
MDAC
IA
IA
Vref2
OA
Compare
Integrate
Amplify
Filter
OA
Compare
Integrate
Amplify
Filter
S
I
IA
JTAG/SPI
Interface Logic
& Configuration
Memory
Auto-Calibration
2.5V Reference
VREFOUT
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISPPAC30-01SI | In-System Programmable Analog Circuit |
| ISPPAC80-01PI | In-System Programmable Analog Circuit |
| ISPPAC80-01SI | In-System Programmable Analog Circuit |
| ISPPAC81 | In-System Programmable Analog Circuit |
| ISPPAC81-01PI | In-System Programmable Analog Circuit |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISPPAC30-01SI | 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 Not Upgrade Device CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| ISPPAC80-01PI | 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| ISPPAC80-01SI | 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| ISPPAC81 | 制造商:LATTICE 制造商全稱(chēng):Lattice Semiconductor 功能描述:In-System Programmable Analog Circuit |
| ISPPAC81-01PI | 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
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