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參數資料
| 型號： | IXTC75N10 |
| 廠商： | IXYS CORP |
| 元件分類： | JFETs |
| 英文描述： | N-Channel Enhancement Mode |
| 中文描述： | 72 A, 100 V, 0.02 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 封裝： | ISOPLUS220, 3 PIN |
| 文件頁數： | 1/2頁 |
| 文件大小： | 81K |
| 代理商： | IXTC75N10 |
2002 IXYS All rights reserved
G = Gate,
S = Source
D = Drain,
* Patent pending
98881 (1/2)
G
D
S
ADVANCE TECHNICAL INFORMATION
ISOPLUS 220
TM
Isolated back surface*
Symbol
Test Conditions
Maximum Ratings
V
DSS
V
DGR
V
GS
V
GSM
I
D25
I
DM
P
D
T
J
T
JM
T
stg
M
d
Weight
T
J
= 25
°
C to 150
°
C
T
J
= 25
°
C to 150
°
C; R
GS
= 1 M
100
V
100
V
Continuous
±
20
±
30
V
Transient
V
T
C
= 25
°
C
T
C
= 25
°
C, pulse width limited by T
JM
T
C
= 25
°
C
72
A
300
A
230
W
-55 ... +150
°
C
°
C
°
C
150
-55 ... +150
Mounting torque
1.13/10
Nm/lb.in.
2
g
Maximum lead temperature for soldering
1.6 mm (0.062 in.) from case for 10 s
300
°
C
MegaMOS
TM
FET
N-Channel Enhancement Mode
Symbol
Test Conditions
Characteristic Values
(T
J
= 25
°
C, unless otherwise specified)
min.
typ.
max.
V
DSS
V
GS(th)
V
GS
= 0 V, I
D
= 250
μ
A
V
DS
= V
GS
, I
D
= 250
μ
A
100
V
2
4
V
I
GSS
V
GS
=
±
20 V
DC
, V
DS
= 0
±
100
nA
I
DSS
V
DS
= 0.8 V
DSS
V
GS
= 0 V
T
J
= 25
°
C
T
J
= 125
°
C
200
μ
A
mA
1
R
DS(on)
V
GS
= 10 V, I
D
= I
T
Pulse test, t
≤
300
μ
s, duty cycle d
≤
2 %
0.020
Features
International standard packages
Low R
DS (on)
HDMOS
TM
process
Rugged polysilicon gate cell structure
Low package inductance (< 5 nH)
- easy to drive and to protect
Fast switching times
Applications
Switch-mode and resonant-mode
power supplies
Motor controls
Uninterruptible
Power Supplies (UPS)
DC choppers
Advantages
Easy to mount with 1 screw (TO-247)
(isolated mounting screw hole)
Space savings
High power density
IXTC 75N10
V
DSS
I
D25
R
DS(on)
= 20 m
= 100 V
= 72 A
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