
1
2104A–BDC–09/03
Features
8-bit Resolution
1 Gsps (Min.) Sampling Rate
ADC Gain Adjust
2 GHz Full Power Input Bandwidth
Fs = 1 Gsps, Fin = 20 MHz:
– SINAD = 45 dB (7.4 Effective Bits) SFDR = 58 dBc
Fs = 1 Gsps, Fin = 500 MHz:
– SINAD = 44 dB (7.2 Effective Bits) SFDR = 56 dBc
Fs = 1 Gsps, Fin = 1000 MHz (-3 dB Fs):
– SINAD = 42 dB (7.0 Effective Bits) SFDR = 52 dBc
2 Tone IMD: -53 dBc (489 MHz and 490 MHz) at 1 Gsps
DNL = 0.3 LSB INL = 0.7 LSB
Low Bit Error Rate (10
-13
)
at 1 Gsps
Very Low Input Capacitance: 0.4 pF (Die Form)
500 mVpp Differential or Single-ended Analog Inputs
Differential or Single-ended 50
ECL Compatible Clock Inputs
ECL or LVDS/HSTL Output Compatibility
Data Ready Output with Asynchronous Reset
Gray or Binary Selectable Output Data; NRZ Output Mode
Power Consumption: 3.4 W at T
J
= 90
°
C
Dual Power Supply: ±5 V
Radiation Tolerance Oriented Design (150 Krad (Si) Measured)
Description
The JTS8388B is a monolithic 8-bit analog-to-digital converter, designed for digitizing
wide bandwidth analog signals at very high sampling rates of up to 1 Gsps.
The JTS8388B uses an innovative architecture, including an on-chip Sample and Hold
(S/H), and is manufactured with an advanced high-speed bipolar process.
The on-chip S/H features a 2 GHz full power input bandwidth, providing excellent
dynamic performance in undersampling applications (High IF digitizing).
Applications
Digital Sampling Oscilloscopes
Satellite Receiver
Electronic Countermeasures/Electronic Warfare
Direct RF Down-conversion
Screening
Standard Die Flow
Mil-PRF-38535, QML Level Q for Package
Version
Space Screening According to ESA/SCC 9000
1 Gsps 8-bit
A/D Converter
JTS8388B