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參數(shù)資料
| 型號： | L64733C-48 |
| 廠商： | LSI CORP |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | TQFP-48 |
| 文件頁數(shù)： | 15/52頁 |
| 文件大小： | 552K |
| 代理商： | L64733C-48 |
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L64733C/L64734 Tuner and Satellite Receiver Chipset
buffers used to drive the differential signals MODp,
MODn, and PLLINp, PLLINn. Connect the other side of
the resistor to ground.
VREF_LVDS
LVDS Buffers Reference Voltage
Input
The VREF_LVDS input is a 1.2 V
± 10% voltage level that
controls the common mode voltage of the LVDSOUT
buffers used to drive the differential signals MODp,
MODn, and PLLINp, PLLINn.
Tuner Control Interface
The Tuner Control Interface contains signals that control the L64733C
Tuner IC.
FLCLK
Filter Control Clock
Output
This is the output of a programmable integer value divider
clocked by PCLK (the demodulator sampling clock). The
division ratio can be programmed with register bits. The
FLCLK frequency multiplied by 16 is the 3 dB cutoff of the
programmable low pass lters on the L64733C.
INSEL
RF Input Select
Output
When INSEL is asserted, the L64733C tuner selects the
normal mode. When INSEL is deasserted, the L64733C
selects the Loop-Through mode.
Typical Operating Circuit
Figure 7 is a diagram of a typical operating circuit for the chipset,
implemented with the L64733C-48 (48-pin package), including external
components. Not all external components are shown. See the
L64733/34
Evaluation Board User’s Guide for complete schematic details.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| L64734 | 制造商:LSI 制造商全稱:LSI 功能描述:Tuner and Satellite Receiver Chipset |
| L64734C-45 | 制造商:LSI 功能描述: 制造商:LSI Corporation 功能描述: |
| L64735GM-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Image Processor |
| L64735GM-27 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Image Processor |
| L64735GM-35 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Image Processor |
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