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參數(shù)資料
| 型號(hào)： | LA76810HA |
| 元件分類(lèi)： | 接收器 |
| 英文描述： | AM/FM, AUDIO/VIDEO DEMODULATOR, PDIP54 |
| 封裝： | 0.600 INCH, DIP-54 |
| 文件頁(yè)數(shù)： | 2/41頁(yè) |
| 文件大小： | 417K |
| 代理商： | LA76810HA |
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LA76810HA
No.A1143-10/41
VIF Block Test Conditions
Input signal
Symbol
Test point
Input signal
Test method
Bus conditions
[VIF block]
Maximum RF AGC
voltage
VRFH
SG1
80dB
Measure the DC voltage at pin 4.
RF.AGC = "000000"
Minimum RF AGC
voltage
VRFL
SG1
80dB
Measure the DC voltage at pin 4.
RF.AGC = "111111"
RF AGC Delay Pt
(@DAC = 0)
RFAGC0
SG1
Obtain the input level at which the DC voltage at
pin 4 becomes 4.5V.
RF.AGC = "000000"
RF AGC Delay Pt
(@DAC = 63)
RFAGC63
SG1
Obtain the input level at which the DC voltage at
pin 4 becomes 4.5V.
RF.AGC = "111111"
Input sensitivity
Vi
SG6
Using an oscilloscope, observe the level at pin 46
and obtain the input level at which the waveform's
p-p value becomes 1.4Vp-p.
No-signal
video output voltage
VOn
No signal
Set IF AGC = “1” and measure the DC voltage at
pin 46.
Sync signal tip level
VOtip
SG1
80dB
Measure the DC voltage at pin 46.
Video output
amplitude
VO
SG6
80dB
Using an oscilloscope, observe the level at pin 46
and measure the waveform’s p-p value.
Video S/N
S/N
SG1
80dB
Measure the noise voltage (Vsn) at pin 46 with an
RMS voltmeter through a 10kHz to 5.0MHz
band-pass filter and calculate 20 log (1.43/Vsn).
C-S beat level
IC-S
SG1
SG2
SG3
Input a 80dB
SG1 signal and measure the DC
voltage (V3) at pin 3. Mix SG1 = 74dB
, SG2 =
64 dB
, and SG3 = 64 dB to enter the mixture in
the VIF IN. Apply V3 to pin 3 from an external DC
power supply. Using a spectrum analyzer,
measure the difference between pin 46’s
4.43MHz component and 1.07MHz component.
Differential gain
DG
SG5
80dB
Using a vector scope, measure the level at Pin
46.
Differential phase
DP
SG5
80dB
Using a vector scope, measure the level at Pin
46.
Maximum AFT
output voltage
VAFTH
SG4
80dB
Set and input the SG4 frequency to 37.9MHz to
be input. Measure the DC voltage at pin 10 at
that moment.
Minimum AFT
output voltage
VAFTL
SG4
80dB
Set and input the SG4 frequency to 39.9MHz to
be input. Measure the DC voltage at pin 10 at
that moment.
AFT detection
sensitivity
VAFTS
SG4
80dB
Adjust the SG4 frequency and measure
frequency deviation
f when the DC voltage at
pin 10 changes from 1.5V to 3.5V.
VAFTS = 2000/
f [mV/kHz]
APC pull-in
range (U), (L)
fPU, fPL
SG4
80dB
Connect an oscilloscope to pin 46 and adjust the
SG4 frequency to a frequency higher than
38.9MHz to bring the PLL into unlocked mode.
(A beat signal appears.) Lower the SG4
frequency and measure the frequency at which
the PLL locks again. In the same manner, adjust
the SG4 frequency to a lower frequency to bring
the PLL into unlocked mode. Higher the SG4
frequency and measure the frequency at which
the PLL locks again.
4
46
10
46
10
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