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參數資料
| 型號： | LC3564BM-10 |
| 文件頁數： | 4/9頁 |
| 文件大小： | 145K |
| 代理商： | LC3564BM-10 |
AC Electrical Characteristics
at Ta = –40 to +85°C, V
CC
= 4.5 to 5.5 V
No. 5804-4/9
LC3564B, BS, BM, BT-70/10
LC3564B, BS, BM, BT
Parameter
Symbol
-70
-10
Unit
min
max
min
max
Read cycle time
t
RC
t
AA
t
CA1
t
CA2
t
OA
t
OH
t
COE1
t
COE2
t
OOE
t
COD1
t
COD2
t
OOD
70
100
ns
Address access time
70
100
ns
CE1 access time
70
100
ns
CE2 access time
70
100
ns
OE access time
35
50
ns
Output hold time
10
10
ns
CE1 output enable time
10
10
ns
CE2 output enable time
10
10
ns
OE output enable time
5
5
ns
CE1 output disable time
30
35
ns
CE2 output disable time
30
35
ns
OE output disable time
25
25
ns
Read Cycle
LC3564B, BS, BM, BT
Parameter
Symbol
-70
-10
Unit
min
max
min
max
Write cycle time
t
WC
t
AS
t
WP
t
CW1
t
CW2
t
WR
t
WR1
t
WR2
t
DS
t
DH
t
DH1
t
DH2
t
WOE
t
WOD
70
100
ns
Address setup time
0
0
ns
Write pulse width
50
55
ns
CE1 setup time
60
65
ns
CE2 setup time
60
65
ns
Write recovery time
0
0
ns
CE1 write recovery time
0
0
ns
CE2 write recovery time
0
0
ns
Data setup time
35
40
ns
Data hold time
0
0
ns
CE1 data hold time
0
0
ns
CE2 data hold time
0
0
ns
WE output enable time
5
5
ns
WE output disable time
30
35
ns
Write Cycle
Parameter
Conditions
[AC Test Conditions]
Input pulse voltage
V
IH
= 2.4 V, V
IL
= 0.6 V
5 ns
Input rise and fall times
Input and output timing level
1.5 V
Output load
LC3564B, BS, BM, and BT-70: 30 pF + 1 TTL gate (Including the jig capacitance.)
LC3564B, BS, BM, and BT-10: 100 pF + 1 TTL gate (Including the jig capacitance.)
相關PDF資料 |
PDF描述 |
|---|---|
| LC3564CT-70U | |
| LC3564P_SERIES | |
| LC3564PL-10 | |
| LC3564PL-12 | |
| LC3564PL-12L | |
相關代理商/技術參數 |
參數描述 |
|---|---|
| LC3564BM-70 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| LC3564BS | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:64K (8192-word ⅴ 8-bit) SRAM with OE, CE1, and CE2 Control Pins |
| LC3564BS-10 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| LC3564BS-70 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| LC3564BT | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:64K (8192-word ⅴ 8-bit) SRAM with OE, CE1, and CE2 Control Pins |
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