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參數資料
| 型號： | LC7073 |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDIP18 |
| 封裝： | DIP-18 |
| 文件頁數： | 5/9頁 |
| 文件大小： | 141K |
| 代理商： | LC7073 |
LC7073, 7073M
No.3932–5/9
Timing Diagrams
The relationship between the LC7073 and LC7073M input data (RDS demodulated data output) and output data is shown
in figure 1.
Figure 1. Input and output data
Note
The dotted lines show data start (DST) pulses when the data start control (DSTCTL) is LOW. The serial output data is
delayed by one block between input and output. The error (ERR) and correction (COR) signals remain active if errors are
detected continually.
Serial Output Data Timing and Format
The following list shows the symbols used in the serial output data string in figure 2.
S
Start bit (normally 0)
E
Error flag (See table 1.)
F
Correction flag (See table 1.)
OE
Offset E (normally 0, not used)
OF
Offset F (normally 0, not used)
A/B
Group. 0–group A, 1–group B
B0, B1
Block bits. 00–1st block, 01–2nd block, 10–3rd block, 11–4th block
D0 to D15
Output data
Table 1. Error and correction flags
Note
× = don’t care
n
o
i
t
a
c
i
d
n
IE
F
r
o
r
e
o
N0
0
d
e
t
c
e
r
o
c
r
o
r
E0
1
e
l
b
a
t
c
e
r
o
c
t
o
N1
×
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