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參數(shù)資料
| 型號(hào)： | LC74725M |
| 元件分類： | 畫面疊加 |
| 英文描述： | ON-SCREEN DISPLAY IC, PDSO24 |
| 封裝： | 0.375 INCH, PLASTIC, MFP-24 |
| 文件頁(yè)數(shù)： | 10/16頁(yè) |
| 文件大小： | 330K |
| 代理商： | LC74725M |
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No. 5213-3/16
LC74725, 74725M
Specifications
Absolute Maximum Ratings at Ta = 25°C
Allowable Operating Ranges at Ta = –30 to +70°C
Note: Extreme care must be used to prevent noise when the XtalIN pin is used in clock input mode.
Electrical Characteristics at Ta = –30 to +70°C, and unless otherwise specified, with VDD1 = 5 V
Parameter
Symbol
Conditions
Ratings
Unit
Maximum supply voltage
VDD max
VDD1, VDD2VSS – 0.3 to VSS + 7.0
V
Maximum input voltage
VIN max
All input pins
VSS – 0.3 to VDD + 0.3
V
Maximum output voltage
VOUT max
LN21, CPDT, SEPOUT, SYNCJDG
VSS – 0.3 to VDD + 0.3
V
Allowable power dissipation
Pd max
Ta = 25°C
350
mW
Operating temperature
Topr
–30 to +70
°C
Storage temperature
Tstg
–40 to +125
°C
Parameter
Symbol
Conditions
min
typ
max
Unit
Supply voltage
VDD1VDD1
4.5
5.0
5.5
V
VDD2VDD2
4.5
5.0
1.27 VDD1V
Input high level voltage
VIH1
RST, CS1, CS2, SIN, SCLK
0.8 VDD1VDD1 + 0.3
V
VIH2
CTRL1, SEPIN
0.7 VDD1VDD1 + 0.3
V
Input low level voltage
VIL1
RST, CS1, CS2, SIN, SCLK
VSS – 0.3
0.2 VDD1V
VIL2
CTRL1, SEPIN
VSS – 0.3
0.3 VDD1V
Pull-up resistance
RPU
Applies to RST, CS1, CS2, SIN, SCLK, and the pins
25
50
90
k
specified as options.
Composite video input voltage
VIN1CVIN: VDD1 = 5 V
2.0
Vp-p
VIN2
SYNIN: VDD1 = 5 V
1.5
2.0
2.5
Vp-p
Input voltage
VIN3
XtalIN (when external clock input is used),
0.1
5.0
Vp-p
fIN = 2fsc or 4fsc: VDD1 = 5 V
fOSC1
XtalIN, XtalOUT oscillator pins (2fsc: NTSC)
7.159
MHz
fOSC1
XtalIN, XtalOUT oscillator pins (4fsc: NTSC)
14.318
MHz
Oscillator frequency
fOSC1
XtalIN, XtalOUT oscillator pins (2fsc: PAL-M)
7.151
MHz
fOSC1
XtalIN, XtalOUT oscillator pins (4fsc: PAL-M)
14.302
MHz
fOSC2
OSCIN, OSCOUT oscillator pins (LC oscillator)
5
12
MHz
Parameter
Symbol
Conditions
min
typ
max
Unit
Input off leakage current
Ileak1CVIN
1A
Output off leakage current
Ileak2CVOUT
1A
Output high level voltage
VOH1
LN21, SYNCJDG, CPDT, SEPOUT: VDD1 = 4.5 V,
3.5
V
IOH = –1.0 mA
Output low level voltage
VOL1
LN21, SYNCJDG, CPDT, SEPOUT: VDD1 = 4.5 V,
1.0
V
IOL = 1.0 mA
Input current
IIH
RST, CS1, CS2, SIN, SCLK, CTRL1, SEPIN: VIN = VDD11
A
IIL
CTRL1, OSCIN: VIN = VSS1–1
A
Operating current drain
IDD1VDD1: All outputs open, crystal: 7.159 MHz, LC: 8 MHz
30
mA
IDD2VDD2: VDD2 = 5 V
20
mA
Sync level
V
SN
When the sync level is 0.8 V, CVOUT: VDD1, VDD2 = 5 V
0.69
0.81
0.98
V
When the sync level is 1.0 V, CVOUT: VDD1, VDD2 = 5 V
0.89
1.01
1.13
V
Pedestal level
V
PD
When the sync level is 0.8 V, CVOUT: VDD1, VDD2 = 5 V
1.28
1.40
1.52
V
When the sync level is 1.0 V, CVOUT: VDD1, VDD2 = 5 V
1.47
1.59
1.71
V
Color burst low level
V
CBL
When the sync level is 0.8 V, CVOUT: VDD1, VDD2 = 5 V
0.97
1.09
1.21
V
When the sync level is 1.0 V, CVOUT: VDD1, VDD2 = 5 V
1.16
1.28
1.40
V
Color burst high level
V
CBH
When the sync level is 0.8 V, CVOUT: VDD1, VDD2 = 5 V
1.60
1.72
1.84
V
When the sync level is 1.0 V, CVOUT: VDD1, VDD2 = 5 V
1.79
1.91
2.03
V
Background color low level
V
RSL
When the sync level is 0.8 V, CVOUT: VDD1, VDD2 = 5 V
1.44
1.56
1.68
V
When the sync level is 1.0 V, CVOUT: VDD1, VDD2 = 5 V
1.63
1.75
1.87
V
Background color high level
V
RSH
When the sync level is 0.8 V, CVOUT: VDD1, VDD2 = 5 V
1.96
2.08
2.20
V
When the sync level is 1.0 V, CVOUT: VDD1, VDD2 = 5 V
2.16
2.28
2.40
V
Continued on next page.
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