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參數資料
| 型號： | LC74781M |
| 廠商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分類： | 畫面疊加 |
| 英文描述： | ON-SCREEN DISPLAY IC, PDSO24 |
| 封裝： | MFP-24 |
| 文件頁數： | 5/16頁 |
| 文件大小： | 183K |
| 代理商： | LC74781M |
Second byte
Note: The register states are all set to zero when the LC74781/M is reset with the RST pin.
COMMAND7 (Display control setup command)
First byte
Second byte
Note: The register states are all set to zero when the LC74781/M is reset with the RST pin.
No. 4988-13/16
LC74781, 74781M
Register content
DA0 to DA7
Register name
State
Function
Note
7
—
0
Second byte identification bit
6
RN2
0
1
5
RN1
0
1
4
RN0
0
1
3
SN3
0
1
2
SN2
0
1
SN1
0
1
0
SN0
0
1
External synchronization signal
detection control
Signal present to absent transition
recognition
Setting for the sampling period when
SYNC can not be detected
consecutively in the horizontal
synchronization signal period (1H).
External synchronization signal detection
control
Signal absent to present transition
recognition
Setting for the sampling period when
SYNC can be detected consecutively in
the horizontal synchronization signal
period (1H).
RN2
RN1
RN0
Number of times HSYNC detected
0
0 times
0
1
4 times
0
1
0
8 times
1
0
16 times
SN3 SN2 SN1 SN0
Number of times HSYNC detected
0
Not detected
0
1
32 times
0
1
0
64 times
0
1
0
128 times
1
0
256 times
Register content
DA0 to DA7
Register name
State
Function
Note
7
—
1
6
—
1
Command 7 identification code
5
—
1
Display control setup
4
—
1
3
EX1
0
MODE1 setting output
Switches the SEPOUT (pin 19) output
1
PORT DATA1 setting output
2
PD1
0
The output is set low.
1
The output is set high.
1
EX0
0
MODE0 setting output
Switches the BLANK (pin 5) output
1
PORT DATA0 setting output
0
PD0
0
The output is set low.
1
The output is set high.
Register content
DA0 to DA7
Register name
State
Function
Note
7
—
0
Second byte identification bit
6
—
0
5
—
0
V falling edge detection
Switches V acquisition polarity when
4
VNPSEL
internal V separation is used in external
1
V rising edge detection
mode.
3
VSPSEL
0
VSEP: about 8.9 s (for NTSC)
Switches the internal V separation time.
1
VSEP: about 17.8 s (for NTSC)
2
MSKERS
0
Mask valid
HSYNC and VSYNC mask release
1
Mask invalid
1
MSKSEL
0
3H (for NTSC)
Switches the VSYNC mask.
1
20H (for NTSC)
0
EGL
0
Border level 0 only (VBK0)
Switches the border level
1
Border level has two stages (VBK0, VBK1)
(Only valid for BLK0 = 0 and BLK1 = 1)
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| LC74781 | ON-SCREEN DISPLAY IC, PDIP24 |
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| LC74782 | ON-SCREEN DISPLAY IC, PDIP24 |
| LC74782M | ON-SCREEN DISPLAY IC, PDSO24 |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| LC74781M-9017-E | 功能描述:顯示驅動器和控制器 RoHS:否 制造商:Panasonic Electronic Components 工作電源電壓:2.7 V to 5.5 V 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Reel |
| LC74781M-9017-TLM-E | 功能描述:顯示驅動器和控制器 RoHS:否 制造商:Panasonic Electronic Components 工作電源電壓:2.7 V to 5.5 V 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Reel |
| LC74782 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-screen Display Controller LSI for VCR Products |
| LC74782M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-screen Display Controller LSI for VCR Products |
| LC74782M-8A13-E | 制造商:ON Semiconductor 功能描述: |
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