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參數資料
型號: LC74782M
元件分類: 畫面疊加
英文描述: ON-SCREEN DISPLAY IC, PDSO24
封裝: MFP-24
文件頁數: 3/16頁
文件大?。?/td> 183K
代理商: LC74782M
| COMMAND4 (Display control setup command)
First byte
Second byte
Note: The register states are all set to zero when the LC74782/M is reset with the RST pin.
No. 4989-11/16
LC74782, 74782M
Register content
DA0 to DA7
Register name
State
Function
Note
7
0
Second byte identification bit
6
BLK2
0
Character display block
Full character size specification
1
Video display block
5
BLK1
0
1
Changes the blanking size.
4
BLK0
0
1
3
BK1
0
Blinking period: about 0.5 s
Switches the blinking period.
1
Blinking period: about 1.0 s
0
Blinking off
When blinking is specified for reversed
2
BK0
characters, the blinking will be between
1
Blinking on
normal character and reversed character
display.
1
RV
0
Reverse (character reversing) off
1
Reverse (character reversing) on
0
DSPON
0
Character display off
1
Character display on
BLK1
BLK0
0
1
0
Blanking off
Character size
1
Border size
Full character size
Register content
DA0 to DA7
Register name
State
Function
Note
7
1
6
1
Command 4 identification code
5
0
Display control
4
0
3
TSTMOD
0
Normal operating mode
This bit must be zero.
1
Test mode
0
The RAM erase operation requires about
2
RAMERS
500 s (It is executed in the DSPOFF
1
Erase display RAM (set to FF hexadecimal)
state.)
1
OSCSTP
0
Do not stop the crystal oscillator and LC oscillator circuits.
Valid when character display is off in
1
Stop the crystal oscillator and LC oscillator circuits.
external synchronization mode.
0
SYSRST
0
Reset occurs when the CS pin is low, and
1
Reset all registers and turn the display off.
the reset is cleared when CS goes high.
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