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參數資料
型號: LC74785M
元件分類: 畫面疊加
英文描述: ON-SCREEN DISPLAY IC, PDSO24
封裝: 0.375 INCH, PLASTIC, SOP-24
文件頁數: 12/24頁
文件大小: 266K
代理商: LC74785M
Pin Assignment
Pin Functions
No. 5520-2/24
LC74785, LC74785M
Pin No.
Pin
Function
Notes
1
VSS1
Ground
Ground connection (digital system ground)
2
Xtal IN
3
Xtal
OUT
(MUTE)
4
CTRL1
(CHABLK)
5
LN21
Data output
6
OSC IN
LC oscillator
7
OSC OUT
8
SYNC
JDG
Enable input pin for the OSD serial data input function.
9
CS1
Enable input
Serial data input is enabled when this pin is low.
A pull-up resistor is built in. (The input has hysteresis characteristics.)
10
SCLK
Clock input
Input for the serial data input clock.
A pull-up resistor is built in. (The input has hysteresis characteristics.)
11
SIN
Data input
Serial data input. A pull-up resistor is built in. (The input has hysteresis
characteristics.)
12
VDD2
Power supply
Composite video signal level adjustment power supply (analog system power
supply)
13
CVOUT
Video signal output
Composite video signal output
14
VSS2
Ground
Ground connection (analog system ground)
Crystal oscillator
(MUTE input)
Crystal oscillator input switching
(CHABLK output)
External synchronizing signal judgment output
These pins are used either to connect the crystal and capacitor used to form an
external crystal oscillator used to generate the internal synchronizing signals, or
to input an external clock signal (2fsc or 4fsc). As a mask option, the Xtalout pin
can be set to function as the MUTE input pin. When this pin is set low, the video
output is held at the pedestal level. (A pull-up resistor is built in and the input has
hysteresis characteristics.)
Switches the mode between external clock input and crystal oscillator operation.
A low level selects crystal oscillator operation and a high level selects external
clock input. As a mask option, the CTRL1 input pin can be set to function as the
CHABLK (character border) output. This is a 3-value output.
Connections for the coil and capacitor that form the character output dot clock
generation oscillator.
Line 21H pulse output
(Even fields when MOD1 is low, both fields when MOD1 is high)
Outputs the state of the external synchronizing signal presence/absence judgment. Outputs a
high level when synchronizing signals are present.
Outputs a field discrimination pulse (O/E pulse) when SEL2 is high.(HLFTON: Valid when 0)
HLFTON: A signal in the range specified by LNA*, LNB*, and LNC* is output when HLFTON is
high.)
Outputs the dot clock (LC oscillator) when CS1 is high and RST is low. (This signal is not
output on command resets.)
Outputs the crystal oscillator clock when CS1 is low and RST is low. (This signal is not output
on command resets.)
Continued on next page.
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相關代理商/技術參數
參數描述
LC74786 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display Controller
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