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參數(shù)資料
| 型號： | LC74785M |
| 元件分類： | 畫面疊加 |
| 英文描述： | ON-SCREEN DISPLAY IC, PDSO24 |
| 封裝： | 0.375 INCH, PLASTIC, SOP-24 |
| 文件頁數(shù)： | 18/24頁 |
| 文件大小： | 266K |
| 代理商： | LC74785M |
No. 5520-3/24
LC74785, LC74785M
Pin No.
Pin
Function
Notes
15
CV IN
Video signal input
Composite video signal input
16
VDD1
Power supply
Power supply (+5 V: digital system power supply)
17
SYNIN
Sync separator circuit input
Video signal input for the built-in sync separator circuit
18
CDLR
Background color phase adjustment
Background color phase adjustment. Connect to ground through a resistor and a capacitor.
19
SEP
OUT
Composite synchronizing signal output
20
SEP
IN
21
CS2
Enable input
22
CPDT
Data output
23
RST
Reset input
24
VDD1
Power supply (+5 V)
Power supply (+5 V: digital system power supply)
Video signal output for the built-in sync separator circuit. Can be switched to function
as an output for signal (high or ST. pulse) due to MOD0 by setting SEL0 high.
Inputs the vertical synchronizing signal created by integrating the SEPOUT pin output
signal.
An integration circuit must be connected to the SEPOUT pin. This pin must be tied to
VDD1 if unused. This pin can be switched to function as the frame signal input mode
by setting SEL1 high. (This is valid when CTL3 is set to 1.)
Vertical synchronizing signal input
EDS data output enable input. EDS data output is enabled when this pin is low. A
pull-up resistor is built in. (The input has hysteresis characteristics.)
EDS data output (This pin can be either an n-channel open-drain output or a CMOS
output.)
System reset input
A pull-up resistor is built in. (The input has hysteresis characteristics.)
Continued from preceding page.
Note: Both VDD1 pins must be connected to the power supply.
Note: When the XtalIN pin is used in clock input mode, extreme care must be taken to prevent noise from entering the input signal.
Parameter
Symbol
Conditions
Ratings
Unit
Supply voltage
VDD
VDD1 and VDD2
VSS–0.3 to VSS+7.0
V
Input voltage
VIN
All input pins
VSS–0.3 to VDD+0.3
V
Output voltage
VOUT
LN21, CPDT, SEPOUT, and SYNCJDG
VSS–0.3 to VDD+0.3
V
Allowable power dissipation
Pd max
Ta = 25°C
350
mW
Operating temperature
Topr
–30 to +70
°C
Storage temperature
Tstg
–40 to +125
°C
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
Supply voltage
VDD1
4.5
5.0
5.5
V
VDD2
4.5
5.0
1.27VDD1
V
IH1
RST, CS1, CS2, SIN, SCLK, SEPIN,
0.8V
DD1
V
DD1 + 0.3
V
Input high-level voltage
and MUTE
VIH2
CTRL1
0.7VDD1
VDD1 + 0.3
V
IL1
RST, CS1, CS2, SIN, SCLK, SEPIN,
V
SS – 0.3
0.2V
DD1
V
Input low-level voltage
and MUTE
VIL2
CTRL1
VSS – 0.3
0.3VDD1
V
Pull-up resistance
RPU
Applies to pins set for the RST, CS1, CS2,
25
50
90
k
SIN, SCLK, and MUTE pin options.
Composite video signal input voltage
VIN1
CVIN; VDD1 = 5 V
2.0
Vp-p
VIN2
SYNIN; VDD1 = 5 V
1.5
2.0
2.5
Vp-p
Input voltage
VIN3
XtalIN (When external clock input is used)
0.10
5.0
Vp-p
fin = 2 fsc or 4 fsc ; VDD1 = 5 V
FOSC1
The XtalIN and XtalOUT oscillator pins
7.159
MHz
(2 fsc: NTSC)
Oscillator frequency
FOSC1
The XtalIN and XtalOUT oscillator pins
14.318
MHz
(4 fsc: NTSC)
F
OSC2
The OSCIN and OSCOUT oscillator pins
5
10
MHz
(LC oscillator)
Allowable Operating Ranges at Ta = –30 to +70°C
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| LC74786 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display Controller |
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