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參數資料
| 型號： | LC74799M |
| 元件分類： | 畫面疊加 |
| 英文描述： | ON-SCREEN DISPLAY IC, PDSO30 |
| 封裝： | 0.375 INCH, MFP-30 |
| 文件頁數： | 4/32頁 |
| 文件大小： | 322K |
| 代理商： | LC74799M |
第1頁第2頁第3頁當前第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁
Note: All registers are set to 0 when the LC74799/M is reset by the RST pin.
Second byte
DA
Register
Contents
Notes
0 to 7
State
Function
7—
0Second byte identification bit
6
BLK2
0
Character display area
1Video display area
5
BLK1
0
1
4
BLK0
0
1
3
BK1
0Blinking period: About 0.5 s
1Blinking period: About 1.0 s
2
BK0
0Blinking off
1Blinking on
1RV
0Reverse video off
1
Reverse video on
0
DSPON
0Character display off
1Character display on
Changes the blanking size
Switches the blinking period
Blinking in reverse video mode switches the display between
normal character display and reverse video display
Specifies the size for complete fill in
No. 5834-12/32
LC74799, 74799M
COMMAND4 (Display control setup command)
First byte
DA
Register
Contents
Notes
0 to 7
State
Function
7—
1
6—
1
5—
1
4—
0
3
TSTMOD
0Normal operating mode
1Test mode
2RAMERS
0
1Erase display RAM. (The RAM data is set to 7F hexadecimal.)
1OSCSTP
0
Do not stop the crystal and VCO oscillators
1Stop the crystal and VCO oscillators
0
SYSRST
0
1Reset all registers and turn display off
Command 4 identification code.
Display character data write setup.
This bit must be set to 0
Erasing RAM takes about 500 s. (This operation
must be executed in the DSPOFF state.)
Valid in external synchronization mode when
character display is off. It will no longer be possible
to detect VPS/PDC data
The registers are reset when the CS pin is low, and
the reset state is cleared when CS is set high
01
0Blanking off
Character size
1Frame size
Complete fill in size
BLK1
BLK0
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