
Zero Cross Switching Control
Zero cross switching is controlled by setting the zero cross control bits to zero cross detection mode (by setting both D36
and D37 to 0), specifying the detection block (with bits D38, D39, D40, and D41), and transferring the data. Since these
control bits are latched immediately after the data is transferred, that is, on the falling edge of the CE signal, when
volume and other setting data is changed, it is possible to also set the mode and the zero cross operation at the same time
in a single data transfer operation. The example below shows a control pattern that can be used at the same time as the
volume setting data is updated.
Zero Cross Timer Setting
When the level of the input signal is lower than the zero cross detector sensitivity setting, or when the input signal is a
low-frequency signal, the system will remain in a state where it cannot detect a zero cross event for an extended period,
and the IC will not be able to latch data during that period. The zero cross timer sets a period for forcibly latching the
data when the IC is in a state such as this where a zero cross cannot be detected.
For example, to set a time of 25 ms:
T = 0.69
× C × R
If C = 0.033 F, then:
25
× 10–3
R = —————————
≈ 1.1 M
0.69
× 0.033 × 10–6
This time is normally set to be in the range 10 to 50 ms.
Notes on Serial Data Transfer
The CL, DI, and CE pin signal lines must be covered by the ground pattern, or shielded cables must be used for these
lines, to prevent high-frequency noise from these signals from entering the audio signal.
The LC75386NE data format consists of 8 bits of address and 44 bits of data. Use the data transfer format shown in the
figure below when transmitting data in multiples of 8 bits (i.e. when sending 48 bits of data).
Data Transfer to the LC75386NE in 8-Bit Units
No. 5937-19/20
LC75386NE
Zero cross detection
mode setting
Volume block setting
D36
D37
D38
D39
D40
D41
001000
Dummy data
Input switching control
Test mode control