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參數資料
| 型號： | LC78647NT |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | 14 X 14 MM, TQFP-100 |
| 文件頁數： | 7/17頁 |
| 文件大小： | 175K |
| 代理商： | LC78647NT |
LC78647NT
-15-
Notes on Application Design
It goes without saying that applications must strictly observe the absolute maximum ratings and allowable
operating ranges (recommended operating conditions) stipulated for this IC to achieve reliability as a system.
However, we also strongly recommend that designers carefully consider both the mounting conditions and
the actual usage environment, including ambient temperatures and static electricity, when designing
applications.
This section provides additional notes concerning design, mounting, and certain other points that require
care during application design.
1. Handling of Unused Pins
— If any unused pins on this IC are left in the open state, certain internal states may become undefined.
Unused pins for which the handling is specified in the documentation must be handled as specified.
Also be sure that no output pins contact any power supply or ground lines or any other output pin.
— If an input/output pin is not used, either set it as an output pin or fix the input level by pull-up or pull-
down with an input setting.
2. Latch-Up Prevention
— The same potential must be applied to all power supply pins on this IC (except power supply pins that
are completely isolated within the IC).
— The IC may latch up if timing discrepancies appear between the rise times for different power supply
pins. Design applications so that no such discrepancies appear.
— Ensure that pin voltage levels are within the absolute maximum ratings and allowable operating
ranges. This point requires special care when power is first applied.
— Do not allow overvoltages or abnormal signal noise levels to be applied to this IC.
— In general, latch-up can be prevented by tying unused pins to VDD or VSS. However, the directions
for unused pin handling in the documentation for this IC must be followed.
— Do not short the outputs.
3. Interface
When different devices are connected, incorrect operation may result if the input VIL and VIH and the
output VOL and VOH levels do not match. Insert level shifters so that the IC is not destroyed if it is
connected to a device that uses a different power supply voltage, such as in a dual power supply system
application.
4. Load Capacitance and Output Current
— If a load with a large capacitance is connected, the wiring may fuse since such a load can result in the
equivalent of an output short for an extended period. Also, excessive charge and discharge currents
can cause noise and degrade application performance or lead to incorrect operation. Use loads of the
recommended capacitance.
— Excessive output sink or source currents can lead to problems similar to those described above. Use
this IC within the recommended current levels while also taking the maximum allowable power
dissipation into consideration.
5. Notes on Power Application and Resets
— There are cases where care is required at power on, during a reset, and when the reset state is cleared.
Refer to the specification sheet for the product and observe the notes concerning power on and IC
resets.
— Output pin states, pin I/O direction settings, and register contents are undefined when power is first
applied to this IC. Items that are defined by the reset operation and when the mode is set are
guaranteed after that operation. Applications must first apply a reset to this IC after power is applied.
Since pin states and register contents that are not defined by the reset operation may change over time
from the states in early versions due to long term variations across lots, applications should not
depend on these values.
— General-purpose I/O pins function as input pins after a reset. When the level is fixed high or low with
an input setting, pull-up or pull-down via a resistance is valid individually from the failsafe point.
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