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參數(shù)資料
| 型號(hào)： | LC8213K |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP80 |
| 封裝： | QFP-80 |
| 文件頁(yè)數(shù)： | 2/5頁(yè) |
| 文件大小： | 171K |
| 代理商： | LC8213K |
Allowable Operating Ranges at Ta = –30 to +70°C, VSS = 0 V
DC Characteristics at Ta = –30 to +70°C, VDD = 4.5 to 5.5 V
Block Diagram
CPU interface
This circuit is a general-purpose 8-bit CPU interface. The operating mode and other aspects are set by accessing the
interface registers and the parameter registers.
Sequence controller
Controls the functional blocks in the IC according to the encoding or decoding algorithm being used.
Encoder
Generates the codes in the various modes by recognizing inflection points in the image data. Encoded data is passed to
the data bus through an 8-bit 4-word encoding FIFO (EFIFO).
Decoder
Recognizes the codes in the various modes and recovers the original image data. Image data is passed to the data bus
through a decoding FIFO (DFIFO).
Image bus interface
Controls reads from and writes to image memory as well as DMA transfers on the image memory bus.
No. 5753-2/5
LC8213K
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
Supply voltage
VDD
4.5
5.0
5.5
V
Input voltage range
VIN
0VDD
V
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
Input high-level voltage
VIH1
2.2
V
Input low-level voltage
VIL1
0.8
V
Input leakage current
IL
–10
+10
A
Output high-level voltage
VOH
IOH = –4 mA
2.4
V
Output low-level voltage
VOL
IOL = 4 mA
0.4
V
Output leakage current
IOZ
For pins in the high-impedance output state
–10
+10
A
Input clock frequency
fCLK
CLK
25
MHz
Current drain
IDD
10
20
mA
A2 to A0
D7 to D0
TEST4 to TEST0
MA23 to MA16
MA/MD15 to MA/MD0
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