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參數資料
| 型號： | LC890561W |
| 廠商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | 7 X 7 MM, SQFP-48 |
| 文件頁數： | 19/47頁 |
| 文件大小： | 357K |
| 代理商： | LC890561W |
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LC890561W
No8226-26/47
13.2 DATAO Output Data Processing
When any of the DTMA [4:0], DTMB [3:0], DTMC [2:0], DTMX [4:0], DTMY [3:0] is set up (setup of those other
than an initial state), delay processing of output data is performed.
Delay processing of the target data and mute processing of output data are explained below.
13.2.1 Output Data Delay Setup after Recovery Processing (Setting at the state of ERROR = H)
When the DTMA[4:0], DTMB[3:0] and DTMC[2:0] commands are set up or changed during high output of ERROR
flag, data is written into memory in synchronization with the rising edge of XSTATE after PLL is locked.
Readout of the data written in the memory is started after the set delay time (frame).
The data read out is constantly output form DATAO with the delay of the setup time.
DATAO will be muted until the set delay time is over, because sufficient data is not written into memory immediately
after the low output of ERROR flag.
Figure 13.1 Timing Chart for Output Data after Setup or Change of the Delay Time During PLL Lock-in
When the DTMA[4:0], DTMB[3:0] and DTMC[2:0] commands are canceled during high output of ERROR flag, data
is output from DATAO synchronizing with the rising edge of XSTATE after PLL is locked. This is normal operation
which does not perform a delay processing setup.
Figure 13.2 Timing Chart for Output Data after Cancel of the Delay Time Setting During PLL Lock-in
DIN*
Lock state
ERROR
DATAO
Mn-1 Wn-1
M1
W1
M2
W2
M3
Mn+1 Wn+1 Mn+2 Wn+2
L0
R0
Unlock
Lock
Delay time
DATAO2
Rn
Ln+1
Ln
Rn+1
SDIN data
R0
L0
SDIN data
0 data (mute)
Wait period:
3ms to 300ms
Wn-2
XSTATE
Same
(XSTP = 0)
DIN*
Lock state
ERROR
DATAO
Mn-1 Wn-1
M1
W1
M2
W2
M3
Mn+1 Wn+1 Mn+2 Wn+2
Unlock
Lock
DATAO2
Rn
Ln+1
Ln
Rn+1
SDIN data
R0
L0
SDIN data
0 data (mute)
Wait period:
3ms to 300ms
Wn-2
XSTATE
Same
(XSTP = 0)
Rn
Ln+1
Ln
Rn+1
R0
L0
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相關代理商/技術參數 |
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| LC890561W-E | 功能描述:音頻發送器、接收器、收發器 RoHS:否 制造商:Cirrus Logic 工作電源電壓:3.3 V, 5 V 電源電流:11.8 mA 通道數量:1 最大工作溫度:+ 70 C 接口類型:I2C, SPI 安裝風格:SMD/SMT 封裝 / 箱體:TSSOP-28 封裝: |
| LC89056W-E | 功能描述:音頻發送器、接收器、收發器 RoHS:否 制造商:Cirrus Logic 工作電源電壓:3.3 V, 5 V 電源電流:11.8 mA 通道數量:1 最大工作溫度:+ 70 C 接口類型:I2C, SPI 安裝風格:SMD/SMT 封裝 / 箱體:TSSOP-28 封裝: |
| LC89057W-VF4AD-E | 制造商:ON Semiconductor 功能描述: |
| LC89057W-VF4A-E | 功能描述:音頻發送器、接收器、收發器 RoHS:否 制造商:Cirrus Logic 工作電源電壓:3.3 V, 5 V 電源電流:11.8 mA 通道數量:1 最大工作溫度:+ 70 C 接口類型:I2C, SPI 安裝風格:SMD/SMT 封裝 / 箱體:TSSOP-28 封裝: |
| LC89057W-VF4A-TBM-E | 制造商:ON Semiconductor 功能描述: 制造商:ON Semiconductor 功能描述:AUDIO I/F RECEIVER |
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