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參數資料
| 型號： | LC895196K |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP144 |
| 封裝： | SQFP-144 |
| 文件頁數： | 2/12頁 |
| 文件大小： | 143K |
| 代理商： | LC895196K |
Pin Descriptions
1. ATAPI
ZCS1FX (input)
Chip select signal for selecting the command block register.
ZCS3FX (input)
Chip select signal for selecting the control block register.
DA0 to 2 (input)
Addresses for accessing the various ATAPI addresses.
ZDASP (input/output)
Drive 1 is output and drive 0 is input.
Signal for indicating the existence of drive 1 to drive 0. Attach external pull-up resistors.
DD0 to DD15 (input/output)
16-bit data bus. Can be used for transferring 8 bit and 16 bit data.
ZDIOR (input)
Read strobe signal from the host.
ZDIOW (input)
Write strobe signal from the host.
ZDMACK (input)
During DMA transmission, this is the acknowledged signal from the host responding to the DMARQ drive request
signal. There is no built-in pull-up resistor.
DMARQ (output)
This is the drive request signal during DMA transmission.
HINTRQ (output)
Drive interrupt signal to the host.
ZIOCS16 (output)
This signal is asserted depending on the drive when the drive can support 16-bit transfers. This signal is not asserted
during DMA transfers.
IORDY (output)
This signal indicates that the drive is ready to respond during data transfer. This signal is low if the drive is not ready.
Attach an external pull-up resistor.
ZPDIAG (input/output)
This signal is asserted by drive 1 to inform drive 0 that the diagnostics are complete. Attach an external pull-up
resistor.
ZHRST (input)
This is the reset signal from the host. Applying a low signal to this pin causes ZRSTIC to go low and resets the drive.
There is no built-in pull-up resistor.
ZINT1 (output)
This is the interrupt request signal from the IDE block to the MC.
CSEL (input)
This is the cable select signal that determines master/slave. Attach an external pull-up resistor.
2. Microcontroller Interface
ZCS (input)
This is the MC-side chip select.
CSCTRL (input)
This signal selects the MC-side chip select logic.
High: ZCS is active low
Low: ZCS is active high
ZRD, ZWR, SUA0 to SUA6 (inputs)
These are the MC interface control signals. Addressing uses SUA0 to SUA6.
ZSWAIT (output)
When the microcontroller accesses the RAM, the SUB-CPU must wait while this pin is low.
No. 5852-10/12
LC895196K
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