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參數(shù)資料
| 型號(hào)： | LC895196K |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP144 |
| 封裝： | SQFP-144 |
| 文件頁(yè)數(shù)： | 3/12頁(yè) |
| 文件大小： | 143K |
| 代理商： | LC895196K |
D7 to D0 (input/output)
This is the MC-side data bus. Built-in pull-up resistor.
ZINT (output)
This is the interrupt signal to the microcontroller.
3. The Buffer RAM
IO0 to IO15 (input/output)
This is the buffer DRAM data bus. Built-in pull-up resistors.
RA0 to RA8 (output)
These are the address pins for the buffer RAM.
ZRAS0 (output)
These are the RAS output pins for the buffer DRAM.
ZCAS0 and ZCAS1 (output)
This is the CAS output pin for the buffer DRAM. Normally ZCAS0 is used. When two 1M (64K
× 16 bit) DRAMS
are used, connect the ZCAS0 output to the CAS pin of each DRAM. When the 2CAS types is used, connect ZCAS0
to UCAS and connect ZCAS1 to LCAS.
ZOE (output)
The read output signal for the buffer DRAM.
ZUWE, ZLWE (output)
This is the write output signal for the buffer DRAM. This connects to various DRAM pins. When the 2CAS type is
used, connect ZLWE to the write enable signal.
4. Subcode Interface
EXCK, WFCK, SBSO, SCOR (input or output)
These are the subcode interface pins. By connecting these to the CD-DSP the subcode data is accepted by the
LC895196K and transferred to the host.
5. The CD-DSP Data
BCK, SDATA, LRCK, C2PO (input)
When connected to CD-DSP, CD-ROM data is acquired. C2PO is a pin for use by the C2 flag.
6. Other Pins
ZRESET (input)
This is the LC895196K reset pin. The LC895196K is reset when this signal is low. This signal must be kept low for
at least a period of 1 s after power on.
XTALCK0, XTAL0
These cause oscillation at 33.8688 MHz. Frequencies from the outside may also be input into XTALCK0.
XTALCK1, XTAL1
Basically, these pins cannot oscillate. If these pins are not used, connect XTALCK1 (pin 100) to ground.
MCK (output)
This outputs the XTALCK1 and XTALCK1/2 frequencies. The output can also be turned off.
No. 5852-11/12
LC895196K
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