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參數資料
| 型號： | LM1267NA/NOPB |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | 3 CHANNEL, VIDEO PREAMPLIFIER, PDIP24 |
| 封裝： | PLASTIC, DIP-24 |
| 文件頁數： | 8/20頁 |
| 文件大小： | 1702K |
| 代理商： | LM1267NA/NOPB |
PCB Layout
Micro-Controller Interface
The micro-controller interfaces to the LM1267 pre-amp via
an I
2C interface. The protocol of the interface begins with the
Start Pulse followed by a byte comprised of a seven-bit
Slave Device Address and a Read/Write bit as the LSB.
Therefore the address of the LM1267 for writing is DCh
(1101 1100) and the address for reading is DDh (1101 1101).
Figures 11, 12 show a write and read sequence across the
I
2C interface.
Write Sequence
The write sequence begins with a start condition which
consists of the master pulling SDA low while SCL is held
high. The slave device address is next sent. The address
byte is made up of an address of seven bits (7–1) and the
read/write bit (0). Bit 0 is low to indicate a write operation.
Each byte that is sent is followed by an acknowledge. When
SCL is high the master will release the SDA line. The slave
must pull SDA low to acknowledge. The address of the
register to be written to is sent next. Following the register
address and the acknowledge bit the data for the register is
sent. If bit 0 of register 0Ah is set low (default value) then the
LM1267 is set for the increment mode. In this mode when
more than one data byte is sent it is automatically incre-
mented into the next address location. See
Figure 11. Note
that each data byte is followed by an acknowledge bit.
Read Sequence
Read sequences are comprised of two I
2C transfer se-
quences. The first is a write sequence that only transfers the
address to be accessed. The second is a read sequence that
starts at the address transferred in the previous address
write access and incrementing to the next address upon
every data byte read. This is shown in
Figure 12.
The write sequence consists of the Start Pulse, the Slave
Device Address including the Read/Write bit (a zero, indicat-
ing a write), then its Acknowledge bit. The next byte is the
address to be accessed, followed by its Acknowledge bit and
the stop bit indicating the end of the address only write
access.
Next the read data access is performed beginning with the
Start Pulse, the Slave Device Address including the Read/
Write bit (a one, indicating a read) and the Acknowledge bit.
The next 8 bits will be the data read from the address
indicated by the write sequence. Subsequent read data
bytes will correspond to the next increment address loca-
tions. Each data byte is separated from the other data bytes
by an Acknowledge bit.
DS200050-31
FIGURE 10. LM126X/LM246X System Neck Board
LM1267
www.national.com
16
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相關代理商/技術參數 |
參數描述 |
|---|---|
| LM1269 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:110 MHz I2C Compatible RGB Video Amplifier System with OSD & DACs |
| LM1269DNA | 制造商:Texas Instruments 功能描述: |
| LM1269DNA/NOPB | 功能描述:IC PREAMP CMOS 110MHZ 24-DIP RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產品變化通告:Product Discontinuation 07/Mar/2011 標準包裝:3,000 系列:OMNITUNE™ 類型:調諧器 應用:移動電話，手機，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應商設備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
| LM1269NA | 制造商:Texas Instruments 功能描述:Video Amplifiers 制造商:Texas Instruments 功能描述:-LIFETIME BUYS TIL 05/12 |
| LM1269NA/NOPB | 功能描述:視頻放大器 RoHS:否 制造商:ON Semiconductor 通道數量:4 電源類型: 工作電源電壓:3.3 V, 5 V 電源電流: 最小工作溫度: 最大工作溫度: 封裝 / 箱體:TSSOP-14 封裝:Reel |
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