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參數資料
| 型號： | LM1882J/883 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, CDIP20 |
| 封裝： | CERAMIC, DIP-20 |
| 文件頁數： | 13/16頁 |
| 文件大小： | 236K |
| 代理商： | LM1882J/883 |
Addressing Logic
The register addressing logic is composed of two blocks of
logic
The first is the address register and counter
(ADDRCNTR) and the second is the address decode
(ADDRDEC)
ADDRCNTR LOGIC
Addresses for the data registers can be generated by one of
two methods Manual addressing requires that each byte of
each register that needs to be loaded needs to be ad-
dressed To load both bytes of all 19 registers would require
a total of 57 load cycles (19 address and 38 data cycles)
Auto Addressing requires that only the initial register value
be specified The Auto Load sequence would require only
39 load cycles to completely program all registers (1 ad-
dress and 38 data cycles) In the auto load sequence the
low order byte of the data register will be written first fol-
lowed by the high order byte on the next load cycle At the
time the High Byte is written the address counter is incre-
mented by 1 The counter has been implemented to loop on
the initial value loaded into the address register For exam-
ple If a value of 0 was written into the address register then
the counter would count from 0 to 18 before resetting back
to 0 If a value of 15 was written into the address register
then the counter would count from 15 to 18 before looping
back to 15 If a value greater than or equal to 18 is placed
into the address register the counter will continuously loop
on this value Auto addressing is initiated on the falling edge
of LOAD when ADDRDATA is 0 and LHBYTE is 1 Incre-
menting and loading of data registers will not commence
until the falling edge of LOAD after ADDRDATA goes to 1
The next rising edge of LOAD will load the first byte of data
Auto Incrementing is disabled on the falling edge of LOAD
after ADDRDATA and LHBYTE goes low
Manual Addressing Mode
Cycle
Load Falling Edge
Load Rising Edge
1
Enable Manual Addressing
Load Address m
2
Enable Lbyte Data Load
Load Lbyte m
3
Enable Hbyte Data Load
Load Hbyte m
4
Enable Manual Addressing
Load Address n
5
Enable Lbyte Data Load
Load Lbyte n
6
Enable Hbyte Data Load
Load Hbyte n
TLF10137 – 7
Auto Addressing Mode
Cycle
Load Falling Edge
Load Rising Edge
1
Enable Auto Addressing
Load Start Address n
2
Enable Lbyte Data Load
Load Lbyte (n)
3
Enable Hbyte Data Load
Load Hbyte (n) Inc Counter
4
Enable Lbyte Data Load
Load Lbyte (na1)
5
Enable Hbyte Data Load
Load Hbyte (na1) Inc Counter
6
Enable Manual Addressing
Load Address
TLF10137 – 8
6
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相關代理商/技術參數 |
參數描述 |
|---|---|
| LM1882-R | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Programmable Video Sync Generator |
| LM1882RCM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TV/Video Sync Circuit |
| LM1882-RCM | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Programmable Video Sync Generator |
| LM1882RCN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TV/Video Sync Circuit |
| LM1882-RCN | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Programmable Video Sync Generator |
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