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參數資料
| 型號： | LM9811CCVF |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號調理 |
| 英文描述： | 10-Bit Greyscale/30-Bit Color Linear CCD Sensor Processor |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PQFP52 |
| 封裝： | TQFP-52 |
| 文件頁數： | 29/36頁 |
| 文件大小： | 605K |
| 代理商： | LM9811CCVF |
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Applications Information
(Continued)
To maximize the integration time for the Red, Green, and
Blue photodiodes, the transfer (TR) pulses should be stag-
gered as shown in Figure 32 This is done by a demultiplexer
(Mux 2) between the TR output of the LM9811 and the trans-
fer gate inputs of the CCD. If the CCD’s transfer gate input
capacitance is relatively low (see the CCD datasheet for this
specification and the requirements for TR pulse rise and fall
time), then the other half of the 74HC4052 may be used to
switch the TR pulses as shown. If the TR gate input capaci-
tance is so large that the minimum TR rise and fall times can
not be met because of the 200
max on resistance of the
74HC4052’s switches, then the 74HC4052 can not be used
to multiplex the TR output and should be replaced with an
active demultiplexer such as the 74HC155 dual 2-to-4 de-
multiplexer.
Two signals (A and B) must be generated to choose which
color is going to be digitized and receives the TR pulse.
These signals can be as simple as the output of a two bit
counter that counts from 0 to 2 (0, 1, 2, 0, 1, 2, etc.). This
counter should be incremented after the end of the previous
line and before the first transfer pulse of the next line. Also,
since each color will need a different VGAgain, the appropri-
ate VGA gain value for each color should be sent to the
LM9811 during this time.
7.2 Parallel Output CCD, Three LM9811s
Figure 33 uses three LM9811s to achieve a 4.5 Mpixel/sec
(1.5M RGB pixels/sec) pixel rate. The three LM9811s are
synchronized by applying the same MCLK and SYNC sig-
nals to all three devices. One LM9811 provides the clock sig-
nals required for the CCD. Since the coefficient data for all
three LM9811s will be latched simultaneously on the rising
edge of CCLK, the correction coefficient bus must either be
at least 24 bits wide (8 correction coefficient bits by 3
LM9811s) or run at a 4.5MHz rate and be latched into a
buffer between the correction coefficient databus and each
LM9811. Similarly, the output data for all three LM9811s will
be available simultaneously at the 3 output databusses.
Since each LM9811 is dedicated to one color, the VGA gain
does not change during line scan.
DS012813-39
FIGURE 31. Parallel Output CCD Application Circuit
DS012813-40
FIGURE 32. Parallel Output CCD Timing
www.national.com
29
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相關代理商/技術參數 |
參數描述 |
|---|---|
| LM9812 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:LM9812 30-Bit Color Linear CCD Sensor Processor |
| LM9812CCV | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:LM9812 30-Bit Color Linear CCD Sensor Processor |
| LM981-SC36 | 功能描述:基本/快動開關 Foot Switch RoHS:否 制造商:Omron Electronics 觸點形式:SPDT 執行器:Lever 電流額定值:5 A 電壓額定值 AC:250 V 電壓額定值 DC:30 V 功率額定值: 工作力:120 g IP 等級:IP 67 NEMA 額定值: 端接類型:Wire 安裝:Panel |
| LM981-ZZ | 功能描述:基本/快動開關 Foot Switch RoHS:否 制造商:Omron Electronics 觸點形式:SPDT 執行器:Lever 電流額定值:5 A 電壓額定值 AC:250 V 電壓額定值 DC:30 V 功率額定值: 工作力:120 g IP 等級:IP 67 NEMA 額定值: 端接類型:Wire 安裝:Panel |
| LM981-ZZ-1 | 功能描述:基本/快動開關 Foot Switch RoHS:否 制造商:Omron Electronics 觸點形式:SPDT 執行器:Lever 電流額定值:5 A 電壓額定值 AC:250 V 電壓額定值 DC:30 V 功率額定值: 工作力:120 g IP 等級:IP 67 NEMA 額定值: 端接類型:Wire 安裝:Panel |
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