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參數資料
| 型號： | LMC660EN |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 運算放大器 |
| 英文描述： | CMOS Quad Operational Amplifier |
| 中文描述： | QUAD OP-AMP, 6500 uV OFFSET-MAX, 1.4 MHz BAND WIDTH, PDIP14 |
| 封裝： | PLASTIC, DIP-14 |
| 文件頁數： | 8/14頁 |
| 文件大小： | 461K |
| 代理商： | LMC660EN |
Application Hints
(Continued)
Capacitive load driving capability is enhanced by using a pull
up resistor to V
(Figure 4). Typically a pull up resistor con-
ducting 500 μA or more will significantly improve capacitive
load responses. The value of the pull up resistor must be de-
termined based on the current sinking capability of the ampli-
fier with respect to the desired output swing. Open loop gain
of the amplifier can also be affected by the pull up resistor
(see Electrical Characteristics).
PRINTED-CIRCUIT-BOARD LAYOUT
FOR HIGH-IMPEDANCE WORK
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. When one wishes to take advantage
of the ultra-low bias current of the LMC662, typically less
than 0.04 pA, it is essential to have an excellent layout. For-
tunately, the techniques for obtaining low leakages are quite
simple. First, the user must not ignore the surface leakage of
the PC board, even though it may sometimes appear accept-
ably low, because under conditions of high humidity or dust
or contamination, the surface leakage will be appreciable.
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LMC660’s inputs and the
terminals of capacitors, diodes, conductors, resistors, relay
terminals, etc. connected to the op-amp’s inputs. See Figure
5 To have a significant effect, guard rings should be placed
on both the top and bottom of the PC board. This PC foil
must then be connected to a voltage which is at the same
voltage as the amplifier inputs, since no leakage current can
flow between two points at the same potential. For example,
a PC board trace-to-pad resistance of 10
, which is nor-
mally considered a very large resistance, could leak 5 pA if
the trace were a 5V bus adjacent to the pad of an input. This
would cause a 100 times degradation from the LMC660’s ac-
tual performance. However, if a guard ring is held within
5 mV of the inputs, then even a resistance of 10
11
would
cause only 0.05 pA of leakage current, or perhaps a minor
(2:1) degradation of the amplifier’s performance. See Figure
6a Figure 6b Figure 6c for typical connections of guard
rings for standard op-amp configurations. If both inputs are
active and at high impedance, the guard can be tied to
ground and still provide some protection; see Figure 6d
DS008767-5
FIGURE 3. Rx, Cx Improve Capacitive Load Tolerance
DS008767-23
FIGURE 4. Compensating for Large Capacitive Loads
with a Pull Up Resistor
DS008767-16
FIGURE 5. Example, using the LMC660,
of Guard Ring in P.C. Board Layout
www.national.com
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| LMC660AIM | RF CONNECTORLFU SURFACE MOUNT JACK, COMPATIBLE WITH U.FL (TM) |
| LMC660AIN | CMOS Quad Operational Amplifier |
| LMC660AMD | CMOS Quad Operational Amplifier |
| LMC660CM | CMOS Quad Operational Amplifier |
| LMC660CN | RF CONNECTOR; 75 OHM N MALE, PANEL MOUNT, SOLDER CUP CONTACT |
相關代理商/技術參數 |
參數描述 |
|---|---|
| LMC660EP | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:CMOS Quad Operational Amplifier |
| LMC662 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:CMOS Dual Operational Amplifier |
| LMC662AIM | 功能描述:運算放大器 - 運放 RoHS:否 制造商:STMicroelectronics 通道數量:4 共模抑制比（最小值）:63 dB 輸入補償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風格:SMD/SMT 封裝 / 箱體:QFN-16 轉換速度:0.89 V/us 關閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
| LMC662AIM | 制造商:Texas Instruments 功能描述:IC OP AMP DUAL SMD SOIC8 662 |
| LMC662AIM/NOPB | 功能描述:運算放大器 - 運放 CMOS DUAL OP AMP RoHS:否 制造商:STMicroelectronics 通道數量:4 共模抑制比（最小值）:63 dB 輸入補償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風格:SMD/SMT 封裝 / 箱體:QFN-16 轉換速度:0.89 V/us 關閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
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