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參數(shù)資料
| 型號(hào)： | LMC7660IN |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Switched Capacitor Voltage Converter |
| 中文描述： | SWITCHED CAPACITOR CONVERTER, 10 kHz SWITCHING FREQ-MAX, PDIP8 |
| 封裝： | PLASTIC, DIP-8 |
| 文件頁數(shù)： | 5/12頁 |
| 文件大小： | 134K |
| 代理商： | LMC7660IN |
Application Information
(Continued)
Typical Applications
Changing Oscillator Frequency
It is possible to dramatically reduce the quiescent operating
current of the LMC7660 by lowering the oscillator frequency.
The oscillator frequency can be lowered from a nominal 10
kHz to several hundred hertz, by adding a slow-down ca-
pacitor C
(Figure 3). As shown in the Typical Performance
Curves the supply current can be lowered to the 10 μA
range. This low current drain can be extremely useful when
used in μPower and battery back-up equipment. It must be
understood that the lower operating frequency and supply
current cause an increased impedance of C
and C
. The in-
creased impedance, due to a lower switching rate, can be
offset by raising C
r
and C
p
until ripple and load current re-
quirements are met.
Synchronizing to an External Clock
Figure 4 shows an LMC7660 synchronized to an external
clock. The CMOS gate overrides the internal oscillator when
it is necessary to switch faster or reduce power supply inter-
ference. The external clock still passes through the
÷
2 circuit
in the 7660, so the pumping frequency will be
1
2
the external
clock frequency.
Lowering Output Impedance
Paralleling two or more LMC7660’s lowers output imped-
ance. Each device must have it’s own pumping capacitor C
p
,
but the reservoir capacitor C
is shared as depicted in Figure
5 The composite output resistance is:
DS009136-6
FIGURE 2. Idealized Voltage Converter
DS009136-7
FIGURE 3. Reduce Supply Current by Lowering Oscillator Frequency
DS009136-8
FIGURE 4. Synchronizing to an External Clock
5
www.national.com
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