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參數資料
型號: LMX2434TM
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: PLLatinum Dual High Frequency Synthesizer for RF Personal Communications
中文描述: PLL FREQUENCY SYNTHESIZER, 5000 MHz, PDSO20
封裝: PLASTIC, TSSOP-20
文件頁數: 9/49頁
文件大小: 943K
代理商: LMX2434TM
Electrical Characteristics
(Continued)
Vcc = EN = 2.5V, 40C
T
A
+85C, unless otherwise specified
Symbol
Parameter
Conditions
Value
Typ
Units
Min
Max
PHASE NOISE CHARACTERISTICS
L
NRF
(f)
RF Synthesizer Normalized Phase
Noise Contribution
(Note 10)
L
NIF
(f)
IF Synthesizer Normalized Phase
Noise Contribution
(Note 10)
L
RF
(f)
RF Synthesizer Single
Side Band Phase
Noise Measured
TCXO Reference Source
RF_CPG Bit = 1
IF_PD Bit = 1
TCXO Reference Source
IF_CPG Bit = 1
RF_PD Bit = 1
f
FinRF
= 2750 MHz
f = 10 kHz offset
f
COMPRF
= 1 MHz
Loop Bandwidth = 100 kHz
N
RF
= 2750
f
OSCin
= 10 MHz
v
OSCin
= 1 V
PP
RF_CPG Bit = 1
IF_PD Bit = 1
T
A
= +25
o
C
(Note 11)
f
FinRF
= 3200 MHz
f = 10 kHz offset
f
COMPRF
= 1 MHz
Loop Bandwidth = 100 kHz
N
RF
= 3200
f
OSCin
= 10 MHz
v
OSCin
= 1 V
PP
RF_CPG Bit = 1
IF_PD Bit = 1
T
A
= +25
o
C
(Note 11)
f
FinRF
= 4700 MHz
f = 10 kHz offset
f
COMPRF
= 1 MHz
Loop Bandwidth = 100 kHz
N
RF
= 4700
f
OSCin
= 10 MHz
v
OSCin
= 1 V
PP
RF_CPG Bit = 1
IF_PD Bit = 1
T
A
= +25
o
C
(Note 11)
-219.0
dBc/
Hz
-214.0
dBc/
Hz
LMX2430
-90.30
dBc/
Hz
LMX2433
-88.90
dBc/
Hz
LMX2434
-85.60
dBc/
Hz
Note 4:
Some of the values in this range are illegal divide ratios (B
<
A). To obtain continuous legal division, the Minimum Divide Ratio must be calculated. Use N
P
*
(P1), where P is the value of the prescaler selected.
Note 5:
Refer to the LMX243x FinRF Sensitivity Test Setup section
Note 6:
Refer to the LMX243x Charge Pump Test Setup section
Note 7:
Refer to the Charge Pump Current Specification Definitions for details on how these measurements are made.
Note 8:
Refer to the LMX243x OSCin Sensitivity Test Setup section
Note 9:
Refer to the LMX243x Serial Data Input Timing section
Note 10:
Normalized Phase Noise Contribution is defined as : L
(f) = L(f) 20 log (N) 10 log (f
), where L(f) is defined as the single side band phase noise
measured at an offset frequency, f, in a 1 Hz bandwidth. The offset frequency, f, must be chosen sufficiently smaller than the PLL’s loop bandwidth, yet large enough
to avoid substantial phase noise contribution from the reference source. N is the value selected for the feedback divider and f
COMP
is the RF/IF phase/ frequency
detector comparison frequency.
Note 11:
The synthesizer phase noise is measured with the LMX2430TM/LMX2430SLE Evaluation boards and the HP8566B Spectrum Analyzer.
L
www.national.com
9
相關PDF資料
PDF描述
LMX2434TMX PLLatinum Dual High Frequency Synthesizer for RF Personal Communications
LMX2430SLEX PLLatinum Dual High Frequency Synthesizer for RF Personal Communications
LMX2430TM PLLatinum Dual High Frequency Synthesizer for RF Personal Communications
LMX2430TMX PLLatinum Dual High Frequency Synthesizer for RF Personal Communications
LMX2433SLEX PLLatinum Dual High Frequency Synthesizer for RF Personal Communications
相關代理商/技術參數
參數描述
LMX2434TM/NOPB 功能描述:鎖相環 - PLL 5.0Ghz High Freq Dual Pll RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
LMX2434TMX 功能描述:鎖相環 - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
LMX2434TMX/NOPB 功能描述:鎖相環 - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
LMX2470 制造商:NSC 制造商全稱:National Semiconductor 功能描述:2.6 GHz Delta-Sigma Fractional-N PLL with 800 MHz Integer-N PLL
LMX2470EVAL 功能描述:時鐘和定時器開發工具 LMX2470 EVAL BOARD RoHS:否 制造商:Texas Instruments 產品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V
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