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參數資料
| 型號： | LTC1421ISW-2.5#PBF |
| 廠商： | Linear Technology |
| 文件頁數： | 6/24頁 |
| 文件大小： | 329K |
| 描述： | IC CONTROLLER HOT SWAP 24-SOIC |
| 標準包裝： | 32 |
| 類型： | 熱交換控制器 |
| 應用： | 通用 |
| 內部開關： | 無 |
| 電源電壓： | 3 V ~ 12 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SOIC（0.295"，7.50mm 寬） |
| 供應商設備封裝： | 24-SOIC |
| 包裝： | 管件 |
6
LTC1421/LTC1421-2.5
PIN FUNCTIONS
U
U
RAMP (Pin 10): Analog Power-Up Ramp Control Pin. By
connecting an external capacitor between the RAMP and
GATEHI, a positive linear voltage ramp on GATEHI and
GATELO is generated on power-up with a slope equal to
20礎/C
RAMP
. A 10k resistor in series with the capacitor
enhances the ESD performance at the GATEHI pin.
FB (Pin 11): Analog Feedback Input. FB is used to set the
reset threshold voltage on V
CCLO
. For a 5V supply leave FB
floating. For a 3.3V supply, short FB to V
CCLO
.
GND (Pin 12): Ground
COMP
+
(Pin 13): Noninverting Comparator Input.
COMP
(Pin 14): Inverting Comparator Input.
COMPOUT (Pin 15): Open Drain Comparator Output.
V
OUTHI
(Pin 16): High Supply Voltage Output. This must be
the higher of the two supply voltage outputs.
GATEHI (Pin 17): The High Side Gate Drive for the High
Supply N-Channel. An internal charge pump guarantees at
least 6V of gate drive. The slope of the voltage rise at
GATEHI is set by the external capacitor connected between
GATEHI and RAMP. When the circuit breaker trips, GATEHI
is immediately pulled to GND.
SETHI (Pin 18): The Circuit Breaker Set Pin for the High
Supply. With a sense resistor placed in the supply path
between V
CCHI
and SETHI, the circuit breaker will trip when
the voltage across the resistor exceeds 50mV for more
than 20祍. To disable the circuit breaker, V
CCHI
and SETHI
should be shorted together.
V
CCHI
(Pin 19): The Positive Supply Input. This must be the
higher of the two input supply voltages. An undervoltage
lockout circuit disables the chip until the voltage at V
CCHI
is greater than 2.45V.
V
OUTLO
(Pin 20): Low Supply Voltage Output. This must be
the lower of the two supply voltage outputs.
GATELO (Pin 21): The High Side Gate Drive for the Low
Supply N-Channel Pass Transistor. An internal charge
pump guarantees at least 10V of gate drive. The slope of
the voltage rise at GATELO is set by the external capacitor
connected between GATEHI and RAMP. When the circuit
breaker trips GATELO is immediately pulled to GND.
SETLO (Pin 22): The Circuit Breaker Set Pin for the Low
Supply. With a sense resistor placed in the supply path
between V
CCLO
and SETLO, the circuit breaker will trip
when the voltage across the resistor exceeds 50mV for
more than 20祍. To disable the circuit breaker, V
CCLO
and
SETLO should be shorted together.
V
CCLO
(Pin 23): The Positive Supply Input. V
CCLO
must be
equal to or lower voltage than V
CCHI
. An undervoltage
lockout circuit disables the chip until the voltage at V
CCLO
is greater than 2.45V.
AUXV
CC
(Pin 24): The supply input for the GATELO and
GATEHI discharge circuitry. Connect a 1礔 capacitor to
ground. AUXV
CC
is powered from V
CCLO
via an internal
Schottky diode and series resistor.
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