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參數(shù)資料
型號: LTC4214-1IMS#TRPBF
廠商: Linear Technology
文件頁數(shù): 29/32頁
文件大小: 277K
描述: IC CTRLR HOTSWAP NEGVOLT 10MSOP
標準包裝: 2,500
類型: 熱交換控制器
應(yīng)用: 通用
內(nèi)部開關(guān):
電源電壓: 6 V ~ 16 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-MSOP
包裝: 帶卷 (TR)
LTC4214-1/LTC4214-2
29
421412f
Soft-Start
If the SS pin is not connected, this pin defaults to a linear
voltage ramp, from 0V to 1.6V in about 220祍 at GATE
start-up, as shown in Figure 17a. If a soft-start capacitor,
C
SS
, is connected to this SS pin, the soft-start response is
modified from a linear ramp to an RC response (Equa-
tion 6), as shown in Figure 17b. This feature allows load
current to slowly ramp-up at GATE start-up. Soft-start is
initiated at time point 3 by a TIMER transition from V
TMRH
to V
TMRL
 (time points 1 to 2) or by the OV pin falling below
the V
OVHI
 V
OVHST
 threshold after an OV condition. When
the SS pin is below 0.2V, the analog current limit amplifier
holds GATE low. Above 0.2V, GATE is released and 50礎(chǔ)
ramps up the compensation network and GATE capaci-
tance at time point 4. Meanwhile, the SS pin voltage
continues to ramp up. When GATE reaches the MOSFETs
threshold, the MOSFET begins to conduct. Due to the
MOSFETs high g
m
, the MOSFET current quickly reaches
the soft-start control value of V
ACL
(t) (Equation 7). At time
point 6, the GATE voltage is controlled by the current limit
amplifier. The soft-start control voltage reaches the circuit
breaker voltage, V
CB
, at time point 7 and the circuit breaker
TIMER activates. As the load capacitor nears full charge,
load current begins to decline below V
ACL
(t). The current
limit loop shuts off and GATE releases at time point 8. At
time point 9, the SENSE voltage falls below V
CB
  and
TIMER deactivates.
Large values of C
SS
 can cause premature circuit breaker
time out as V
ACL
(t) may exceed the V
CB
 potential during
the circuit breaker delay. The load capacitor is unable to
achieve full charge in one GATE start-up cycle. A more
serious side effect of large C
SS
 values is SOA duration may
be exceeded during soft-start into a low impedance load.
A soft-start voltage below V
CB
 will not activate the circuit
breaker TIMER.
Figure 17. Soft-Start Timing (All Waveforms are Referenced to V
EE
)
(17a) Without External C
SS
(17b) With External C
SS
APPLICATIO  S I FOR  ATIO
U
U
U
TIMER
GATE
SENSE
SS
DRAIN
V
TMRH
V
DRNCL
V
ACL
V
CB
V
DRNL
V
GS(th)
V
IN
  V
GATEH
V
TMRL
40礎(chǔ) + 8 " I
DRN
4214 F17
PWRGD
5礎(chǔ)
50礎(chǔ)
50礎(chǔ)
TIMER
GATE
SENSE
SS
DRAIN
V
TMRH
V
DRNCL
V
CB
V
ACL
V
DRNL
V
GS(th)
V
IN
  V
GATEH
V
TMRL
40礎(chǔ) + 8 " I
DRN
PWRGD
5礎(chǔ)
50礎(chǔ)
50礎(chǔ)
12 34 567    7a
8  9   10  11
END OF INTIAL TIMING CYCLE
12 34  5 6
7
8  9   10  11
END OF INTIAL TIMING CYCLE
20 " V
OS
20 " (V
CB
 + V
OS
)
20 " (V
ACL
 + V
OS
)
20 " V
OS
20 " (V
CB
 + V
OS
)
20 " (V
ACL
 + V
OS
)
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