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參數資料
| 型號： | M68HC16 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 16-Bit Microcontroller(16位微控制器) |
| 中文描述： | 16位微控制器（16位微控制器） |
| 文件頁數： | 1/52頁 |
| 文件大小： | 358K |
| 代理商： | M68HC16 |
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AN1283/D
MOTOROLA INC, 1996
SEMICONDUCTOR
APPLICATION NOTE
MOTOROLA
Transporting M68HC11 Code to M68HC16 Devices
By Michael Greenberg and Harold Roberson
1 INTRODUCTION
Devices in the Motorola M68HC16 modular microcontroller family are built up from standard modules that
interface via a common internal bus. Modularity facilitates rapid development of devices tailored for specific
applications. The standard central processing unit in the M68HC16 family is the 16-bit CPU16 module. Both
the CPU16 programming model and the CPU16 instruction set are designed for compatibility with the
M68HC11 CPU, and M68HC11 applications can be ported to the CPU16 with moderate effort. However,
because the CPU16 has additional capabilities, the functions of certain M68HC11 instructions have been
modified and some M68HC11 CPU instructions have been replaced by instructions specific to the CPU16.
In addition, the M68HC11 CPU and CPU16 manage interrupts differently.
This note is intended to assist programmers who wish to transport code from the M68HC11 CPU to the
CPU16. It compares the capabilities of the two processors, provides information concerning differences in
the respective instruction sets, and discusses cases that need special attention. For more detailed informa-
tion, please refer to the
M68HC11 Reference Manual
Manual
(CPU16RM/AD).
(M68HC11RM/AD) and to the
CPU16 Reference
2 M68HC11 CPU
The M68HC11 CPU treats all peripheral, I/O, and memory locations as addresses in its memory map. There
are no special instructions for I/O that are distinct from those used for memory. This architecture also allows
accessing an operand from an external memory location with no execution-time penalty.
2.1 Programming Model
M68HC11 CPU registers are an integral part of the processing unit and are not addressed as memory lo-
cations.
Figure 1
shows the programming model. The following paragraphs describe the registers.
Figure 1 M68HC11 CPU Programming Model
20
16 15
8 7
0 BIT POSITION
A
B
ACCUMULATORS A AND B
ACCUMULATOR D (A : B)
D
IX
INDEX REGISTER X
IY
INDEX REGISTER Y
SP
STACK POINTER
PC
PROGRAM COUNTER
CCR
CONDITION CODE REGISTER
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