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參數資料
| 型號： | MAX6616AEG+T |
| 廠商： | Maxim Integrated |
| 文件頁數： | 10/20頁 |
| 文件大小： | 194K |
| 描述： | IC TEMP MON FAN CNTRL 24QSOP |
| 產品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 功能： | 風扇控制，溫度監控器 |
| 傳感器類型： | 內部和外部 |
| 感應溫度： | 0°C ~ 140°C |
| 精確度： | ±1°C 本地（最大），±4°C 遠程（最大） |
| 拓撲： | ADC |
| 輸出類型： | I²C?/SMBus? |
| 輸出警報： | 無 |
| 輸出風扇： | 無 |
| 電源電壓： | 3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SSOP（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 24-QSOP |
| 包裝： | 帶卷 (TR) |
the duty cycle returns to either 0% or the fan-start duty
cycle. The value of the hysteresis is set by D7 of the
fan-configuration register.
The duty cycle is limited to the value in the fan maximum
duty-cycle register. If the duty-cycle value is larger than
the maximum fan duty cycle, it is set to the maximum
fan-duty cycle as in the fan maximum duty-cycle register.
The temperature step is bit D6 of the fan-configuration
register (0Dh).
Notice if temperature crosses FanStartTemperature
going up with an initial DutyCycle of zero, a spin-up of
2s applies before the duty-cycle calculation controls
the value of the fans duty cycle.
FanStartTemperature for a particular channel follows the
channel, not the fan. If DutyCycle is an odd number, it is
automatically rounded down to the closest even number.
Duty-Cycle Rate-of-Change Control
To reduce the audibility of changes in fan speed, the
rate of change of the duty cycle is limited by the values
set in the duty-cycle rate-of-change register. Whenever
the target duty cycle is different from the instantaneous
duty cycle, the duty cycle increases or decreases at
the rate determined by the duty-cycle rate-of-change
byte until it reaches the target duty cycle. By setting the
rate of change to the appropriate value, the thermal
requirements of the system can be balanced against
good acoustic performance. Slower rates of change
are less noticeable to the user, while faster rates of
change can help minimize temperature variations.
Remember that the fan controller is part of a complex
control system. Because several of the parameters are
generally not known, some experimentation may be
necessary to arrive at the best settings.
Fan-Fail
When the fan tachometer count is larger than the fan
tachometer limit, the fan is considered failing. The
MAX6615/MAX6616 PWM_ drives the fan with 100%
duty cycle for about 2s immediately after detecting a
fan-fail. At the end of that period, another measurement
is initiated. If the fan fails both measurements, the
FAN_FAIL bit, as well as the FAN_FAIL output, assert if
the pin is not masked. If the fan fails only the first mea-
surement, the fan goes back to normal settings.
If one fan fails, it can be useful to drive the other fan
with 100% duty cycle. This can be enabled with bit D0
of the fan-status register (1Ch).
Slave Addresses
The MAX6615/MAX6616 appear to the SMBus as one
device having a common address for both ADC chan-
nels. The devices address can be set to one of nine
different values by pinstrapping ADD0 and ADD1 so
that more than one MAX6615/MAX6616 can reside on
the same bus without address conflicts (see Table 2).
The address input states are checked regularly, and
the address data stays latched to reduce quiescent
supply current due to the bias current needed for high-
impedance state detection.
Power-On Defaults
At power-on, or when the POR bit in the configuration
byte register is set, the MAX6615/MAX6616 have the
default settings indicated in Table 3. Some of these set-
tings are summarized below:
" Temperature conversions are active.
" Channel 1 and channel 2 are set to report the
remote temperature channel measurements.
" Channel 1 OT limit = +110癈.
" Channel 2 OT limit = +80癈.
" Manual fan mode.
" Fan-start duty cycle = 0.
" PWM invert bit = 1.
Dual-Channel Temperature Monitors and
Fan-Speed Controllers with Thermistor Inputs
10 ______________________________________________________________________________________
FAN-START
DUTY CYCLE
TEMPERATURE
DUTY CYCLE
REGISTER 02h,
BIT D3 = 1
DUTY-CYCLE
STEP SIZE
FAN-START
TEMPERATURE
TEMP
STEP
REGISTER 02h,
BIT D3 = 0
Figure 7. Automatic PWM Duty Control
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