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參數資料
| 型號： | MB81ES653225-12L |
| 廠商： | Fujitsu Limited |
| 英文描述： | Consumer/Embedded Application Specific Memory for SiP |
| 中文描述： | 消費/嵌入式SIP應用程序特定的內存 |
| 文件頁數： | 6/44頁 |
| 文件大?。?/td> | 485K |
| 代理商： | MB81ES653225-12L |
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MB81ES653225-12/-12L
6
■
FUNCTIONAL TRUTH TABLE
*
1
1.
COMMAND TRUTH TABLE
*
2,
*
3,
*
4
*1 : V
=
Valid, L
=
Logic Low, H
=
Logic High, X
=
either L or H.
Row Address
128 page length : A
12
to A
0
64 page length : A
13
to A
0
32 page length : A
14
to A
0
Column Address
128 page length : A
6
to A
0
64 page length : A
5
to A
0
32 page length : A
4
to A
0
*2 : All commands assume no CSUS command on previous rising edge of clock.
*3 : All commands are assumed to be valid state transitions.
*4 : All inputs are latched on the rising edge of clock.
*5 : NOP and DESL commands have the same effect. Unless specifically noted, NOP will represent both NOP and
DESL command in later description.
*6 : When the current state is idle and CKE
=
L, BST command will represent Deep Power Down command.
Refer to “3. CKE TRUTH TABLE” in section “
■
FUNCTION TRUTH TABLE”.
*7 : READ, READA, WRIT, WRITA and BST commands should only be issued after the corresponding bank has
been activated (ACTV command) . Refer to “
■
STATE DIAGRAM”.
*8 : ACTV command should only be issued after corresponding bank has been precharged (PRE or PALL command) .
*9 : Required after power up. Refer to “22. POWER-UP INITIALIZATION” in section “
■
FUNCTIONAL
DESCRIPTION”.
*10 : MRS command should only be issued after all banks have been precharged (PRE or PALL command) .
Refer to “
■
STATE DIAGRAM”.
Function
Symbol
CKE
CS
RAS CAS
WE
BA
A
10
(AP)
Address
(Except for A
10
)
n-1
n
Device Deselect
*
5
DESL
H
X
H
X
X
X
X
X
X
No Operation
*
5
NOP
H
X
L
H
H
H
X
X
X
Burst Stop
*
6,
*
7
BST
H
X
L
H
H
L
X
X
X
Read
*
7
READ
H
X
L
H
L
H
V
L
Column Address
Read with Auto-precharge
*
7
READA
H
X
L
H
L
H
V
H
Column Address
Write
*
7
WRIT
H
X
L
H
L
L
V
L
Column Address
Write with Auto-precharge
*
7
WRITA
H
X
L
H
L
L
V
H
Column Address
Bank Active
*
8
ACTV
H
X
L
L
H
H
V
Row Address
Precharge Single Bank
PRE
H
X
L
L
H
L
V
L
X
Precharge All Banks
PALL
H
X
L
L
H
L
X
H
X
Mode Register Set
*
9,
*
10
MRS
H
X
L
L
L
L
V
V
V
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