
130
CHAPTER 4 I/O PORT
4.9.1
Registers of Port 7 (PDR7, DDR7)
This section describes the registers related to port 7.
I
Functions of the Registers of Port 7
H
Port 7 data register (PDR7)
The PDR7 register indicates the states of pins. Thus, if the pins are set as output ports, the
same values ("0" or "1") can be read as those of the output latch. However, if the pins are set
as input ports, the values of the output latch cannot be read.
Since the values of the output latch rather than the pins are read when a bit manipulation
instruction (SETB, CLRB) is used, the values of the output latch whose bits are not manipulated
do not change.
H
Port 7 direction register (DDR7)
The DDR7 register sets the I/O direction of pins for each bit.
If "1" is set to the bit corresponding to a port, the port becomes an output port. If "0" is set to the
bit corresponding to a port, the port becomes an input port.
H
Settings for resource input
To use port 7 for resource input, set "0" to the bit of the DDR7 register corresponding to the
resource input pin and set "1" to the bit corresponding to the CIER register.
Table 4.9-3 "Register Functions of Port 7" lists the register functions of port 7.
Table 4.9-3 Register Functions of Port 7
Register
name
Data
Read
Write
Read/write
Address
Initial value
Port 7
data
register
(PDR7)
0
Pin state is
"L"
The "L" level is output to the
pins if port 7 operates as an
output port.
R/W
0025
H
XXXXXXXX
B
1
Pin state is
"H"
The "H" level is output to the
pins if port 7 operates as an
output port.
Port 7
direction
register
(DDR7)
0
Input port
state
Output transistor operation is
prohibited and a pin is made
an input pin.
R/W
0026
H
00000000
B
1
Output port
state
Output transistor operation is
allowed and a pin is made an
output pin.
R/W: Read/write enabled
X: Undefined