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參數(shù)資料
| 型號(hào)： | MC100EP52DR2G |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類(lèi)： | 通用總線功能 |
| 英文描述： | 3.3V / 5V ECL Differential Data and Clock D Flip−Flop |
| 中文描述： | 100E SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8 |
| 封裝： | LEAD FREE, SOIC-8 |
| 文件頁(yè)數(shù)： | 1/12頁(yè) |
| 文件大?。?/td> | 168K |
| 代理商： | MC100EP52DR2G |
Semiconductor Components Industries, LLC, 2006
December, 2006
Rev. 6
1
Publication Order Number:
MC10EP52/D
MC10EP52, MC100EP52
3.3V / 5VECL Differential
Data and Clock D FlipFlop
Description
The MC10EP/100EP52 is a differential data, differential clock D
flip
flop. The device is pin and functionally equivalent to the EL52
device.
Data enters the master portion of the flip
flop when the clock is
LOW and is transferred to the slave, and thus the outputs, upon a
positive transition of the clock. The differential clock inputs of the
EP52 allow the device to also be used as a negative edge triggered
device.
The EP52 employs input clamping circuitry so that under open input
conditions (pulled down to V
EE
) the outputs of the device will remain
stable.
The 100 Series contains temperature compensation.
Features
330 ps Typical Propagation Delay
Maximum Frequency
PECL Mode: V
CC
= 3.0 V to 5.5 V with V
EE
= 0 V
NECL Mode: V
CC
= 0 V with V
EE
=
3.0 V to
5.5 V
Open Input Default State
Safety Clamp on Inputs
Q Output Will Default LOW with Inputs Open or at V
EE
Pb
Free Packages are Available
4 GHz Typical
*For additional marking information, refer to
Application Note AND8002/D.
H
K
5T
3O
= MC10
= MC100
= MC10
= MC100
A
L
Y
W
M
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Date Code
= Pb
Free Package
(Note: Microdot may be in either location)
ALYW
HP52
ALYW
KP52
MARKING
DIAGRAMS*
SOIC
8
D SUFFIX
CASE 751
TSSOP
8
DT SUFFIX
CASE 948R
1
8
1
8
1
8
http://onsemi.com
1
8
HEP52
ALYW
1
8
KEP52
ALYW
1
8
DFN8
MN SUFFIX
CASE 506AA
5
1
4
3
1
4
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
ORDERING INFORMATION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC100EP52DTG | 3.3V / 5V ECL Differential Data and Clock D Flip−Flop |
| MC100EP52DTR2G | 3.3V / 5V ECL Differential Data and Clock D Flip−Flop |
| MC100EP52MNR4 | 3.3V / 5V ECL Differential Data and Clock D Flip−Flop |
| MC100EP52MNR4G | 3.3V / 5V ECL Differential Data and Clock D Flip−Flop |
| MC10EP52DG | 3.3V / 5V ECL Differential Data and Clock D Flip−Flop |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC100EP52DT | 功能描述:觸發(fā)器 3.3V/5V ECL D-Type RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類(lèi)型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類(lèi)型:CMOS 輸出類(lèi)型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| MC100EP52DTG | 功能描述:觸發(fā)器 3.3V/5V ECL D-Type w/Diff Data and Clk RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類(lèi)型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類(lèi)型:CMOS 輸出類(lèi)型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| MC100EP52DTG | 制造商:ON Semiconductor 功能描述:Flip Flop Logic IC |
| MC100EP52DTR2 | 功能描述:觸發(fā)器 3.3V/5V ECL D-Type RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類(lèi)型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類(lèi)型:CMOS 輸出類(lèi)型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| MC100EP52DTR2G | 功能描述:觸發(fā)器 3.3V/5V ECL D-Type w/Diff Data and Clk RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類(lèi)型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類(lèi)型:CMOS 輸出類(lèi)型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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