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參數(shù)資料
| 型號(hào)： | MC10133 |
| 廠商： | Motorola, Inc. |
| 英文描述： | Quad Latch |
| 中文描述： | 四鎖存 |
| 文件頁(yè)數(shù)： | 1/4頁(yè) |
| 文件大小： | 85K |
| 代理商： | MC10133 |
LOGIC DIAGRAM
VCC1= PIN 1
VCC2= PIN 16
VEE= PIN 8
Q0
Q1
Q2
Q3
3
D0
2
Q0
5
7
G0
D1
4
CE
13
CC
12
CE
9
D2
G1
14
D3
6
Q1
11 Q2
15 Q3
10
SEMICONDUCTOR TECHNICAL DATA
3–13
REV 6
Motorola, Inc. 1996
9/96
The MC10133 is a high speed, low power, quad latch consisting of four
bistable latch circuits with D type inputs and gated Q outputs, allowing direct
wiring to a bus. When the clock is high, outputs will follow D inputs. Information
is latched on the negative going transition of the clock.
The outputs are gated when the output enable (G) is low. All four latches may
be clocked at one time with the common clock (CC), or each half may be
clocked separately with its clock enable (CE).
PD= 310 mW typ/pkg (No Load)
tpd= 4.0 ns typ
tr, tf= 2.0 ns typ (20%–80%)
TRUTH TABLE
G
H
L
L
L
C
X
L
H
H
D
X
X
L
H
Qn+1
L
Qn
L
H
C = CC + CE
DIP
PIN ASSIGNMENT
VCC1
Q0
D0
CE
G0
Q1
D1
VEE
VCC2
Q3
D3
CC
CE
Q2
G1
D2
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC10133P | 4-Bit D-type Registers with 3-State Outputs 16-CDIP -55 to 125 |
| MC10134FN | 4-Bit D-type Registers with 3-State Outputs 16-CDIP -55 to 125 |
| MC10134L | Dual Multiplexer With Latch |
| MC10134P | Replaced by SN54LS175 : Quadruple D-type Flip-Flops With Clear 16-CDIP -55 to 125 |
| MC10153FN | Quad Latch |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC10133L | 制造商:ON Semiconductor 功能描述: |
| MC10133LD | 制造商:Motorola Inc 功能描述:Latch, Dual, 2 Bit, 16 Pin, Ceramic, DIP |
| MC10134P | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC10135FN | 制造商:ON Semiconductor 功能描述:Flip Flop JK-Master-Slave Type Pos-Edge 1-Element 20-Pin PLLC Rail 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC10135FN WAF | 制造商:ON Semiconductor 功能描述: |
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