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參數資料
| 型號： | MC10133FN |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 鎖存器 |
| 英文描述： | 10K SERIES, DUAL HIGH LEVEL TRIGGERED D LATCH, TRUE OUTPUT, PQCC20 |
| 封裝： | PLASTIC, LCC-20 |
| 文件頁數： | 1/3頁 |
| 文件大小： | 55K |
| 代理商： | MC10133FN |
Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev. 7
309
Publication Order Number:
MC10133/D
MC10133
Quad Latch
The MC10133 is a high speed, low power, quad latch consisting of
four bistable latch circuits with D type inputs and gated Q outputs,
allowing direct wiring to a bus. When the clock is high, outputs will
follow D inputs. Information is latched on the negative going
transition of the clock.
The outputs are gated when the output enable (G) is low. All four
latches may be clocked at one time with the common clock (CC), or
each half may be clocked separately with its clock enable (CE).
PD=310 mW typ/pkg (No Load)
tpd= 4.0 ns typ
tr, tf= 2.0 ns typ (20%–80%)
DIP PIN ASSIGNMENT
VCC1
Q0
D0
CE
G0
Q1
D1
VEE
VCC2
Q3
D3
CC
CE
Q2
G1
D2
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
LOGIC DIAGRAM
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
Q0
Q1
Q2
Q3
3
D0
2Q0
5
G0
7
D1
4
CE
13
CC
12
CE
9
D2
14
D3
6Q1
11 Q2
15 Q3
10
G1
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18.
http://onsemi.com
Device
Package
Shipping
ORDERING INFORMATION
MC10133L
CDIP–16
25 Units / Rail
MC10133P
PDIP–16
25 Units / Rail
MC10133FN
PLCC–20
46 Units / Rail
MARKING
DIAGRAMS
1
16
A
= Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
CDIP–16
L SUFFIX
CASE 620
MC10133L
AWLYYWW
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775
10133
AWLYYWW
1
16
MC10133P
AWLYYWW
G
CQn+1
TRUTH TABLE
C = CC = CE
H
L
X
L
H
L
Qn
L
H
D
X
L
H
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相關代理商/技術參數 |
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|---|---|
| MC10133L | 制造商:ON Semiconductor 功能描述: |
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| MC10135FN | 制造商:ON Semiconductor 功能描述:Flip Flop JK-Master-Slave Type Pos-Edge 1-Element 20-Pin PLLC Rail 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC10135FN WAF | 制造商:ON Semiconductor 功能描述: |
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