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參數資料
| 型號： | MC10134P |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 鎖存器 |
| 英文描述： | 10K SERIES, DUAL LOW LEVEL TRIGGERED D LATCH, COMPLEMENTARY OUTPUT, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數： | 1/3頁 |
| 文件大小： | 51K |
| 代理商： | MC10134P |
Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev. 6
312
Publication Order Number:
MC10134/D
MC10134
Dual Multiplexer With Latch
The MC10134 is a dual multiplexer with clocked D type latches.
Each latch may be clocked separately by holding the common clock in
the low state, and using the clock enable inputs for the clocking
function. If the common clock is to be used to clock the latch, the clock
enable (CE) inputs must be in the low state. In this mode, the enable
inputs perform the function of controlling the common clock (CC).
The data select inputs determine which data input is enabled. A high
(H) level on the A0 input enables data input D12 and a low (L) level on
the A0 input enables data input D11. A high (H) level on the A1 input
enables data input D22 and a low (L) level on the A1 input enables
data input D21.
Any change on the data input will be reflected at the outputs while
the clock is low. The outputs are latched on the positive transition of
the clock. While the clock is in the high state, a change in the
information present at the data inputs will not affect the output
information.
PD = 225 mW typ/pkg (No Load)
tpd = 3.0 ns typ
tr, tf = 2.5 ns typ (20%–80%)
DIP PIN ASSIGNMENT
VCC1
Q1
D11
D12
A0
CC
VEE
VCC2
Q2
D21
D22
A1
CEO
CE1
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18.
LOGIC DIAGRAM
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
11
A1
2Q1
4
D11
5
D12
10
CEO
7
CC
9
CE1
13
D21
12
D22
3Q1
15 Q2
14 Q2
6
A0
http://onsemi.com
Device
Package
Shipping
ORDERING INFORMATION
MC10134L
CDIP–16
25 Units / Rail
MC10134P
PDIP–16
25 Units / Rail
MC10134FN
PLCC–20
46 Units / Rail
MARKING
DIAGRAMS
1
16
A
= Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
CDIP–16
L SUFFIX
CASE 620
MC10134L
AWLYYWW
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775
10134
AWLYYWW
1
16
MC10134P
AWLYYWW
CA0
Qn+1
TRUTH TABLE
C = CE + CC
L
H
L
H
X
L
H
L
H
Qn
D11
D12
L
H
X
L
H
X
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