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參數(shù)資料
型號： MC68HC11A8BMP2
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： HCMOS Single-Chip Microcontroller
中文描述： 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDIP48
封裝： DIP-48
文件頁數(shù)： 107/158頁
文件大小： 776K
代理商： MC68HC11A8BMP2
MC68HC11A8
TECHNICAL DATA
CPU, ADDRESSING MODES, AND INSTRUCTION SET
MOTOROLA
10-9
10
LDS (opr)
Load Stack Pointer
M:M + 1
→
SP
IMM
DIR
EXT
IND,X
IND,Y
IMM
DIR
EXT
IND,X
IND,Y
IMM
DIR
EXT
IND,X
IND,Y
EXT
IND,X
IND,Y
A INH
B INH
8E
9E
BE
AE
18 AE
CE
DE
jj kk
dd
hh ll
ff
ff
jj kk
dd
hh ll
ff
ff
jj kk
dd
hh ll
ff
ff
hh ll
ff
ff
3
2
3
2
3
3
2
3
2
3
4
3
4
3
3
3
2
3
1
1
3
4
5
5
6
3
4
5
5
6
4
5
6
6
6
6
6
7
2
2
3-2
4-3
5-4
6-6
7-6
3-2
4-3
5-4
6-6
7-6
3-4
4-5
5-6
6-7
7-6
5-8
6-3
3-7
2-1
2-1
- - - -
¤ ¤
0 -
LDX (opr)
Load Index Register X
M:M + 1
→
IX
FE
EE
CD EE
18 CE
18 DE
18 FE
1A EE
18 EE
- - - -
¤ ¤
0 -
LDY (opr)
Load Index Register Y
M:M + 1
→
IY
- - - -
¤ ¤
0 -
LSL (opr)
LSLA
LSLB
Logical Shift Left
78
68
18 68
48
58
- - - -
¤ ¤ ¤ ¤
LSLD
Logical Shift Left Double
INH
05
1
3
2-2
- - - -
¤ ¤ ¤ ¤
LSR (opr)
LSRA
LSRB
Logical Shift Right
EXT
IND,X
IND,Y
A INH
B INH
74
64
18 64
44
54
hh ll
ff
ff
3
2
3
1
1
6
6
7
2
2
5-8
6-3
7-3
2-1
2-1
- - - -
¤ ¤ ¤ ¤
LSRD
Logical Shift Right Double
INH
04
1
3
2-2
- - - - 0
¤ ¤ ¤
MUL
Multiply 8 by 8
AxB
→
D
INH
3D
1
10
2-13
- - - - - - -
¤
NEG (opr)
2’s Complement Memory Byte 0 – M
→
M
EXT
IND,X
IND,Y
A INH
B INH
INH
A IMM
A DIR
A EXT
A IND,X
A IND,Y
B IMM
B DIR
B EXT
B IND,X
B IND,Y
A INH
B INH
INH
INH
A INH
B INH
INH
INH
EXT
IND,X
IND,Y
A INH
B INH
70
60
18 60
hh ll
ff
ff
3
2
3
1
1
1
2
2
3
2
3
2
2
3
2
3
1
1
1
2
1
1
1
2
3
2
3
1
1
6
6
7
2
2
2
2
3
4
4
5
2
3
4
4
5
3
3
4
5
4
4
5
6
6
6
7
2
2
5-8
6-3
7-3
2-1
2-1
2-1
3-1
4-1
5-2
6-2
7-2
3-1
4-1
5-2
6-2
7-2
2-6
2-6
2-7
2-8
2-9
2-9
2-10
2-11
5-8
6-3
7-3
2-1
2-1
- - - -
¤ ¤ ¤ ¤
NEGA
NEGB
NOP
ORAA (opr) OR Accumulator A (Inclusive) A + M
→
A
2’s Complement A
2’s Complement B
No Operation
0 – A
→
A
0 – B
→
B
No Operation
40
50
01
8A
9A
BA
AA
- - - -
¤ ¤ ¤ ¤
- - - -
¤ ¤ ¤ ¤
- - - - - - - -
- - - -
¤ ¤
0 -
18 AA
CA
DA
ii
dd
hh ll
ff
ff
ii
dd
hh ll
ff
ff
ORAB (opr) OR Accumulator B (Inclusive) B + M
→
B
FA
EA
18 EA
- - - -
¤ ¤
0 -
PSHA
PSHB
PSHX
PSHY
PULA
PULB
PULX
PULY
ROL (opr)
Push A onto Stack
Push B onto Stack
Push X onto Stack (Lo First)
Push Y onto Stack (Lo First)
Pull A from Stack
Pull B from Stack
Pull X from Stack (Hi First)
Pull Y from Stack (Hi First)
Rotate Left
A
→
Stk, SP = SP–1
B
→
Stk, SP = SP–1
IX
→
Stk, SP = SP–2
IY
→
Stk, SP = SP–2
SP = SP + 1, A
←
Stk
SP = SP + 1, B
←
Stk
SP = SP + 2, IX
←
Stk
SP = SP + 2, IY
←
Stk
36
37
3C
- - - - - - - -
- - - - - - - -
- - - - - - - -
- - - - - - - -
- - - - - - - -
- - - - - - - -
- - - - - - - -
- - - - - - - -
- - - -
¤ ¤ ¤ ¤
18 3C
32
33
38
18 38
79
69
18 69
49
59
hh ll
ff
ff
ROLA
ROLB
Table 10-1 MC68HC11A8 Instructions, Addressing Modes, and Execution Times
(Sheet 4 of 6)
Source
Form(s)
Operation
Boolean Expression
Addressing
Mode for
Operand
Machine Coding
(Hexadecimal)
Opcode
B
C
Cycle
by
Cycle*
Condition Codes
Operand(s)
S X H I N Z V C
*Cycle-by-cycle number provides a reference to Tables 10-2 through 10-8 which detail cycle-by-cycle operation.
Example: Table 10-1 Cycle-by-Cycle column reference number 2-4 equals Table 10-2 line item 2-4.
C
b0
b7
0
C
b0
b15
0
C
b0
b7
0
C
b0
b15
0
C
b0
b7
C
相關(guān)PDF資料
PDF描述
MC68HC11A8BVP2 HCMOS Single-Chip Microcontroller
MC68HC11A1CFN2 HCMOS Single-Chip Microcontroller
MC68HCP11A1CFN2 HCMOS Single-Chip Microcontroller
MC68HCP11A1CFN3 HCMOS Single-Chip Microcontroller
MC68HCP11A1CP2 HCMOS Single-Chip Microcontroller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC68HC11A8BVP2 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:HCMOS Single-Chip Microcontroller
MC68HC11A8FN 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:8-Bit Microcontrollers
MC68HC11A8FN1 制造商:Motorola Inc 功能描述:
MC68HC11A8MCFN2 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:HCMOS Single-Chip Microcontroller
MC68HC11A8P1 制造商:Rochester Electronics LLC 功能描述:- Bulk
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