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參數資料
型號: MC68HC11A8VCFU2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: HCMOS Single-Chip Microcontroller
中文描述: 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQFP64
封裝: QFP-64
文件頁數: 56/158頁
文件大小: 776K
代理商: MC68HC11A8VCFU2
MOTOROLA
5-12
SERIAL COMMUNICATIONS INTERFACE
MC68HC11A8
TECHNICAL DATA
5
RCKB — SCI Baud Rate Clock Check (Test)
This bit is used during factory testing to enable the exclusive-OR of the receiver clock
and transmitter clock to be driven out the TxD pin. RCKB is zero and cannot be set
while in normal operating modes.
The diagram shown in
Figure 5-7
and the data given in
Table 5-3
and
Table 5-4
illus-
trate the divider chain used to obtain the baud rate clock. Note that there is a fixed rate
divide-by-16 between the receive clock (RT) and the transmit clock (Tx). The actual
divider chain is controlled by the combined SCP[1:0] and SCR[2:0] bits in the baud rate
register as illustrated.
Figure 5-7 Rate Generator Division
Table 5-2 Second Prescaler Stage
SCR2
SCR1
SCR0
Prescaler Output
Divide By
1
2
4
8
16
32
64
128
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Table 5-3 Prescaler Highest Baud Rate Frequency Output
SCP Bit
1
Clock*
Divided
By
1
3
4
13
Crystal Frequency (MHz)
8.0
0
12.0
8.3886
4.9152
4.0
3.6864
0
0
1
1
0
1
0
1
187.50 K Baud
62.50 K Baud
46.875 K Baud
14.423 K Baud
131.072 K Baud 125.000 K Baud 76.80 K Baud
43.690 K Baud
41.666 K Baud
32.768 K Baud
31.250 K Baud
10.082 K Baud
9600 Baud
62.50 K Baud 57.60 K Baud
25.60 K Baud 20.833 K Baud 19.20 K Baud
19.20 K Baud 15.625 K Baud 14.40 K Baud
5.907 K Baud
4800 Baud
4430 Baud
*The clock in the “Clock Divided By” column is the internal processor clock
÷
4
SCI BAUD DIV
OSCILLATOR
FREQUENCY
SCI TRANSMITTER
CLOCK
SCI RECEIVER
CLOCK
INTERNAL BUS
CLOCK (PH2)
SCI
PRESCALER
SCP[1:0]
SCI BAUD
SELECT
SCR[2:0]
÷
16
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