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參數(shù)資料
型號(hào): MC68HC11K1MFN2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT MICROCONTROLLER
中文描述: 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQCC84
封裝: PLASTIC, LCC-84
文件頁(yè)數(shù): 60/80頁(yè)
文件大小: 420K
代理商: MC68HC11K1MFN2
MOTOROLA
60
M68HC11 K Series
MC68HC11KTS/D
9 Analog-to-Digital Converter
The analog-to-digital (A/D) converter system uses an all-capacitive charge-redistribution technique to
convert analog signals to digital values. The A/D converter system contained in M68HC11 K-series
MCUs is an 8-channel,8-bit, multiplexed-input, successive-approximation converter. It does not require
external sample and hold circuits.
The clock source for the A/D converter’s charge pump, like the clock source for the EEPROM charge
pump, is selected with the CSEL bit in the OPTION register. When the E clock is slower than 1 MHz,
the CSEL bit must be set to ensure that the successive approximation sequence for the A/D converter
will be completed before any charge loss occurs. In the case of the EEPROM, it is the efficiency of the
charge pump that is affected.
Figure 14 A/D Converter Block Diagram
The A/D converter can operate in single or multiple conversion modes. Multiple conversions are per-
formed in sequences of four. Sequences can be performed on a single channel or an a group of chan-
nels.
Dedicated lines V
RH
and V
RL
provide the reference supply voltage inputs.
PE0/
AN0
PE1/
AN1
PE2/
AN2
PE3/
AN3
ANALOG
MUX
8-BIT CAPACITIVE DAC
WITH SAMPLE AND HOLD
SUCCESSIVE APPROXIMATION
REGISTER AND CONTROL
ADCTL
A/D CONTROL
C
C
C
M
S
C
C
ADDR 3
A/D RESULT 3
RESULT REGISTER INTERFACE
RESULT
INTERNAL
DATA BUS
VRH
VRL
ADDR 4
A/D RESULT 4
ADDR 2
A/D RESULT 2
ADDR 1
A/D RESULT 1
PE4/
AN4
PE5/
AN5
PE6/
AN6
PE7/
AN7
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