- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371057 > MC74ACT109D (MOTOROLA INC) DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP PDF資料下載
參數(shù)資料
| 型號(hào)： | MC74ACT109D |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP |
| 中文描述： | ACT SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 |
| 封裝： | PLASTIC, SOIC-16 |
| 文件頁(yè)數(shù)： | 2/6頁(yè) |
| 文件大小： | 197K |
| 代理商： | MC74ACT109D |
MC74AC109 MC74ACT109
5-2
FACT DATA
SD
K
CP
J
CD
Q
Q
Please note that this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
LOGIC DIAGRAM
(one half shown)
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
VCC
Vin
Vout
Iin
Iout
ICC
Tstg
DC Supply Voltage (Referenced to GND)
–0.5 to +7.0
V
DC Input Voltage (Referenced to GND)
–0.5 to VCC +0.5
–0.5 to VCC +0.5
±
20
V
DC Output Voltage (Referenced to GND)
V
DC Input Current, per Pin
mA
DC Output Sink/Source Current, per Pin
±
50
mA
DC VCC or GND Current per Output Pin
Storage Temperature
±
50
mA
–65 to +150
°
C
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended
Operating Conditions.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Typ
Max
Unit
VCC
Supply Voltage
′
AC
′
ACT
2.0
5.0
6.0
V
4.5
5.0
5.5
Vin, Vout
DC Input Voltage, Output Voltage (Ref. to GND)
0
VCC
V
′
AC Devices except Schmitt Inputs
VCC @ 3.0 V
VCC @ 4.5 V
VCC @ 5.5 V
VCC @ 4.5 V
VCC @ 5.5 V
150
tr, tf
Input Rise and Fall Time (Note 1)
40
ns/V
25
tr, tf
Input Rise and Fall Time (Note 2)
′
ACT Devices except Schmitt Inputs
10
ns/V
8.0
TJ
TA
IOH
IOL
Junction Temperature (PDIP)
140
°
C
Operating Ambient Temperature Range
–40
25
85
°
C
Output Current — High
–24
mA
Output Current — Low
24
mA
1. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC74AC109 | DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP |
| MC74ACT109 | DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP |
| MC74AC109D | DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP |
| MC74AC109N | DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP |
| MC74ACT109N | DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC74ACT109DR2 | 制造商:ON Semiconductor 功能描述:Flip Flop JK# -Type Pos-Edge 2-Element 16-Pin SOIC T/R 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC74ACT109DT | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Dual JK Positive Edge−Triggered Flip−Flop |
| MC74ACT109DTR2 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Dual JK Positive Edge−Triggered Flip−Flop |
| MC74ACT109M | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Dual JK Positive Edge−Triggered Flip−Flop |
| MC74ACT109MEL | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Dual JK Positive Edge−Triggered Flip−Flop |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。